From: Stefan Roese <sr@denx.de>
Date: Mon, 20 Nov 2006 19:39:52 +0000 (+0100)
Subject: [PATCH] Update AMCC Sequoia config file to support 64MByte NOR FLASH
X-Git-Tag: U-Boot-1_2_0~35
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=4ef6251403f637841000e0fef9e832aa01339822;p=u-boot

[PATCH] Update AMCC Sequoia config file to support 64MByte NOR FLASH

Signed-off-by: Stefan Roese <sr@denx.de>
---

diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h
index 3a76315b44..1a460cde06 100644
--- a/include/configs/sequoia.h
+++ b/include/configs/sequoia.h
@@ -53,7 +53,7 @@
 
 #define CFG_BOOT_BASE_ADDR	0xf0000000
 #define CFG_SDRAM_BASE		0x00000000	/* _must_ be 0		*/
-#define CFG_FLASH_BASE		0xfe000000	/* start of FLASH	*/
+#define CFG_FLASH_BASE		0xfc000000	/* start of FLASH	*/
 #define CFG_MONITOR_BASE	TEXT_BASE
 #define CFG_NAND_ADDR		0xd0000000      /* NAND Flash		*/
 #define CFG_OCM_BASE		0xe0010000      /* ocm			*/
@@ -234,10 +234,10 @@
 		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
 	"net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;"     \
 	        "bootm\0"						\
-	"rootpath=/opt/eldk/ppc_4xx\0"					\
+	"rootpath=/opt/eldk/ppc_4xxFP\0"					\
 	"bootfile=/tftpboot/sequoia/uImage\0"				\
-	"kernel_addr=FE000000\0"					\
-	"ramdisk_addr=FE180000\0"					\
+	"kernel_addr=FC000000\0"					\
+	"ramdisk_addr=FC180000\0"					\
 	"load=tftp 100000 /tftpboot/sequoia/u-boot.bin\0"		\
 	"update=protect off FFFA0000 FFFFFFFF;era FFFA0000 FFFFFFFF;"	\
 		"cp.b 100000 FFFA0000 60000\0"			        \
@@ -378,7 +378,7 @@
 #define CFG_NAND_CS		3		/* NAND chip connected to CSx	*/
 /* Memory Bank 0 (NOR-FLASH) initialization					*/
 #define CFG_EBC_PB0AP		0x03017300
-#define CFG_EBC_PB0CR		(CFG_FLASH | 0xba000)
+#define CFG_EBC_PB0CR		(CFG_FLASH | 0xda000)
 
 /* Memory Bank 3 (NAND-FLASH) initialization					*/
 #define CFG_EBC_PB3AP		0x018003c0
@@ -387,7 +387,7 @@
 #define CFG_NAND_CS		0		/* NAND chip connected to CSx	*/
 /* Memory Bank 3 (NOR-FLASH) initialization					*/
 #define CFG_EBC_PB3AP		0x03017300
-#define CFG_EBC_PB3CR		(CFG_FLASH | 0xba000)
+#define CFG_EBC_PB3CR		(CFG_FLASH | 0xda000)
 
 /* Memory Bank 0 (NAND-FLASH) initialization					*/
 #define CFG_EBC_PB0AP		0x018003c0