From: oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Date: Tue, 14 Oct 2008 06:26:33 +0000 (+0000)
Subject: John McCarthy <jgmcc@magma.ca> two patches add a mips_m4k target option (ejtag_reset... 
X-Git-Tag: v0.1.0~259
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=4fa359b53d2681f6f5851291556a7266a97968b2;p=openocd

John McCarthy <jgmcc@magma.ca> two patches add a mips_m4k target option (ejtag_reset) to cause a reset command to use the EJTAG Peripheral and System Reset in addition to srst.  This is for targets like the wrt54gl which do not connect the
srst to a system reset (I believe it just goes to a GPIO).

git-svn-id: svn://svn.berlios.de/openocd/trunk@1050 b42882b7-edfa-0310-969c-e2dbd0fdcd60
---

diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index be7f59ec..04c9a1ef 100644
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -256,14 +256,21 @@ int mips_m4k_assert_reset(target_t *target)
 		mips_ejtag_set_instr(ejtag_info, EJTAG_INST_NORMALBOOT, NULL);
 	}
 	
-	/* here we should issue a srst only, but we may have to assert trst as well */
-	if (jtag_reset_config & RESET_SRST_PULLS_TRST)
-	{
-		jtag_add_reset(1, 1);
-	}
-	else
-	{
-		jtag_add_reset(0, 1);
+	if (strcmp(target->variant, "ejtag_srst") == 0) {
+		u32 ejtag_ctrl = ejtag_info->ejtag_ctrl | EJTAG_CTRL_PRRST | EJTAG_CTRL_PERRST;
+		LOG_DEBUG("Using EJTAG reset (PRRST) to reset processor...");
+		mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
+		mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
+	} else {
+		/* here we should issue a srst only, but we may have to assert trst as well */
+		if (jtag_reset_config & RESET_SRST_PULLS_TRST)
+		{
+			jtag_add_reset(1, 1);
+		}
+		else
+		{
+			jtag_add_reset(0, 1);
+		}
 	}
 	
 	target->state = TARGET_RESET;