From: Reinhard Arlt Date: Wed, 10 Jun 2009 17:09:40 +0000 (+0200) Subject: Add support for the Tundra TSI148 VME-bridge X-Git-Tag: v2009.08-rc1~63 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=52a0e2dee90c17e39634de814b16b96061cfb472;p=u-boot Add support for the Tundra TSI148 VME-bridge From: Reinhard Arlt This patch adds support for the Tundra TSI148 VME-bridge. It's used on the upcoming esd VME8349 board. Signed-off-by: Reinhard Arlt Signed-off-by: Stefan Roese --- diff --git a/common/Makefile b/common/Makefile index 89f1c883bc..3781738e19 100644 --- a/common/Makefile +++ b/common/Makefile @@ -135,6 +135,7 @@ COBJS-$(CONFIG_CMD_SPI) += cmd_spi.o COBJS-$(CONFIG_CMD_SPIBOOTLDR) += cmd_spibootldr.o COBJS-$(CONFIG_CMD_STRINGS) += cmd_strings.o COBJS-$(CONFIG_CMD_TERMINAL) += cmd_terminal.o +COBJS-$(CONFIG_CMD_TSI148) += cmd_tsi148.o COBJS-$(CONFIG_CMD_UBI) += cmd_ubi.o COBJS-$(CONFIG_CMD_UBIFS) += cmd_ubifs.o COBJS-$(CONFIG_CMD_UNIVERSE) += cmd_universe.o diff --git a/common/cmd_tsi148.c b/common/cmd_tsi148.c new file mode 100644 index 0000000000..222938ce80 --- /dev/null +++ b/common/cmd_tsi148.c @@ -0,0 +1,488 @@ +/* + * (C) Copyright 2009 Reinhard Arlt, reinhard.arlt@esd-electronics.com + * + * base on universe.h by + * + * (C) Copyright 2003 Stefan Roese, stefan.roese@esd-electronics.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#define DEBUG + +#include +#include +#include +#include +#include + +#include + +#define PCI_VENDOR PCI_VENDOR_ID_TUNDRA +#define PCI_DEVICE PCI_DEVICE_ID_TUNDRA_TSI148 + +typedef struct _TSI148_DEV TSI148_DEV; + +struct _TSI148_DEV { + int bus; + pci_dev_t busdevfn; + TSI148 *uregs; + unsigned int pci_bs; +}; + +static TSI148_DEV *dev; + +/* + * Most of the TSI148 register are BIGENDIAN + * This is the reason for the __raw_writel(htonl(x), x) usage! + */ + +int tsi148_init(void) +{ + int j, result, lastError = 0; + pci_dev_t busdevfn; + unsigned int val; + + busdevfn = pci_find_device(PCI_VENDOR, PCI_DEVICE, 0); + if (busdevfn == -1) { + puts("Tsi148: No Tundra Tsi148 found!\n"); + return -1; + } + + /* Lets turn Latency off */ + pci_write_config_dword(busdevfn, 0x0c, 0); + + dev = malloc(sizeof(*dev)); + if (NULL == dev) { + puts("Tsi148: No memory!\n"); + result = -1; + goto break_20; + } + + memset(dev, 0, sizeof(*dev)); + dev->busdevfn = busdevfn; + + pci_read_config_dword(busdevfn, PCI_BASE_ADDRESS_0, &val); + val &= ~0xf; + dev->uregs = (TSI148 *)val; + + debug("Tsi148: Base : %p\n", dev->uregs); + + /* check mapping */ + debug("Tsi148: Read via mapping, PCI_ID = %08X\n", readl(&dev->uregs->pci_id)); + if (((PCI_DEVICE << 16) | PCI_VENDOR) != readl(&dev->uregs->pci_id)) { + printf("Tsi148: Cannot read PCI-ID via Mapping: %08x\n", + readl(&dev->uregs->pci_id)); + result = -1; + goto break_30; + } + + debug("Tsi148: PCI_BS = %08X\n", readl(&dev->uregs->pci_mbarl)); + + dev->pci_bs = readl(&dev->uregs->pci_mbarl); + + /* turn off windows */ + for (j = 0; j < 8; j++) { + __raw_writel(htonl(0x00000000), &dev->uregs->outbound[j].otat); + __raw_writel(htonl(0x00000000), &dev->uregs->inbound[j].itat); + } + + /* Tsi148 VME timeout etc */ + __raw_writel(htonl(0x00000084), &dev->uregs->vctrl); + + if ((__raw_readl(&dev->uregs->vstat) & 0x00000100) != 0) + debug("Tsi148: System Controller!\n"); + else + debug("Tsi148: Not System Controller!\n"); + + /* + * Lets turn off interrupts + */ + /* Disable interrupts in Tsi148 first */ + __raw_writel(htonl(0x00000000), &dev->uregs->inten); + /* Disable interrupt out */ + __raw_writel(htonl(0x00000000), &dev->uregs->inteo); + eieio(); + /* Reset all IRQ's */ + __raw_writel(htonl(0x03ff3f00), &dev->uregs->intc); + /* Map all ints to 0 */ + __raw_writel(htonl(0x00000000), &dev->uregs->intm1); + __raw_writel(htonl(0x00000000), &dev->uregs->intm2); + eieio(); + + val = __raw_readl(&dev->uregs->vstat); + val &= ~(0x00004000); + __raw_writel(val, &dev->uregs->vstat); + eieio(); + + debug("Tsi148: register struct size %08x\n", sizeof(TSI148)); + + return 0; + + break_30: + free(dev); + dev = NULL; + break_20: + lastError = result; + + return result; +} + +/* + * Create pci slave window (access: pci -> vme) + */ +int tsi148_pci_slave_window(unsigned int pciAddr, unsigned int vmeAddr, int size, int vam, int vdw) +{ + int result, i; + unsigned int ctl = 0; + + if (NULL == dev) { + result = -1; + goto exit_10; + } + + for (i = 0; i < 8; i++) { + if (0x00000000 == readl(&dev->uregs->outbound[i].otat)) + break; + } + + if (i > 7) { + printf("Tsi148: No Image available\n"); + result = -1; + goto exit_10; + } + + debug("Tsi148: Using image %d\n", i); + + printf("Tsi148: Pci addr %08x\n", pciAddr); + + + __raw_writel(htonl(pciAddr) , &dev->uregs->outbound[i].otsal); + __raw_writel(0x00000000 , &dev->uregs->outbound[i].otsau); + __raw_writel(htonl(pciAddr + size), &dev->uregs->outbound[i].oteal); + __raw_writel(0x00000000 , &dev->uregs->outbound[i].oteau); + __raw_writel(htonl(vmeAddr - pciAddr), &dev->uregs->outbound[i].otofl); + __raw_writel(0x00000000 , &dev->uregs->outbound[i].otofu); + + switch (vam & VME_AM_Axx) { + case VME_AM_A16: + ctl = 0x00000000; + break; + case VME_AM_A24: + ctl = 0x00000001; + break; + case VME_AM_A32: + ctl = 0x00000002; + break; + } + + switch (vam & VME_AM_Mxx) { + case VME_AM_DATA: + ctl |= 0x00000000; + break; + case VME_AM_PROG: + ctl |= 0x00000010; + break; + } + + if (vam & VME_AM_SUP) + ctl |= 0x00000020; + + switch (vdw & VME_FLAG_Dxx) { + case VME_FLAG_D16: + ctl |= 0x00000000; + break; + case VME_FLAG_D32: + ctl |= 0x00000040; + break; + } + + ctl |= 0x80040000; /* enable, no prefetch */ + + __raw_writel(htonl(ctl), &dev->uregs->outbound[i].otat); + + debug("Tsi148: window-addr =%p\n", + &dev->uregs->outbound[i].otsau); + debug("Tsi148: pci slave window[%d] attr =%08x\n", + i, ntohl(__raw_readl(&dev->uregs->outbound[i].otat))); + debug("Tsi148: pci slave window[%d] start =%08x\n", + i, ntohl(__raw_readl(&dev->uregs->outbound[i].otsal))); + debug("Tsi148: pci slave window[%d] end =%08x\n", + i, ntohl(__raw_readl(&dev->uregs->outbound[i].oteal))); + debug("Tsi148: pci slave window[%d] offset=%08x\n", + i, ntohl(__raw_readl(&dev->uregs->outbound[i].otofl))); + + return 0; + + exit_10: + return -result; +} + +unsigned int tsi148_eval_vam(int vam) +{ + unsigned int ctl = 0; + + switch (vam & VME_AM_Axx) { + case VME_AM_A16: + ctl = 0x00000000; + break; + case VME_AM_A24: + ctl = 0x00000010; + break; + case VME_AM_A32: + ctl = 0x00000020; + break; + } + switch (vam & VME_AM_Mxx) { + case VME_AM_DATA: + ctl |= 0x00000001; + break; + case VME_AM_PROG: + ctl |= 0x00000002; + break; + case (VME_AM_PROG | VME_AM_DATA): + ctl |= 0x00000003; + break; + } + + if (vam & VME_AM_SUP) + ctl |= 0x00000008; + if (vam & VME_AM_USR) + ctl |= 0x00000004; + + return ctl; +} + +/* + * Create vme slave window (access: vme -> pci) + */ +int tsi148_vme_slave_window(unsigned int vmeAddr, unsigned int pciAddr, int size, int vam) +{ + int result, i; + unsigned int ctl = 0; + + if (NULL == dev) { + result = -1; + goto exit_10; + } + + for (i = 0; i < 8; i++) { + if (0x00000000 == readl(&dev->uregs->inbound[i].itat)) + break; + } + + if (i > 7) { + printf("Tsi148: No Image available\n"); + result = -1; + goto exit_10; + } + + debug("Tsi148: Using image %d\n", i); + + __raw_writel(htonl(vmeAddr), &dev->uregs->inbound[i].itsal); + __raw_writel(0x00000000, &dev->uregs->inbound[i].itsau); + __raw_writel(htonl(vmeAddr + size), &dev->uregs->inbound[i].iteal); + __raw_writel(0x00000000, &dev->uregs->inbound[i].iteau); + __raw_writel(htonl(pciAddr - vmeAddr), &dev->uregs->inbound[i].itofl); + if (vmeAddr > pciAddr) + __raw_writel(0xffffffff, &dev->uregs->inbound[i].itofu); + else + __raw_writel(0x00000000, &dev->uregs->inbound[i].itofu); + + ctl = tsi148_eval_vam(vam); + ctl |= 0x80000000; /* enable */ + __raw_writel(htonl(ctl), &dev->uregs->inbound[i].itat); + + debug("Tsi148: window-addr =%p\n", + &dev->uregs->inbound[i].itsau); + debug("Tsi148: vme slave window[%d] attr =%08x\n", + i, ntohl(__raw_readl(&dev->uregs->inbound[i].itat))) ; + debug("Tsi148: vme slave window[%d] start =%08x\n", + i, ntohl(__raw_readl(&dev->uregs->inbound[i].itsal))); + debug("Tsi148: vme slave window[%d] end =%08x\n", + i, ntohl(__raw_readl(&dev->uregs->inbound[i].iteal))); + debug("Tsi148: vme slave window[%d] offset=%08x\n", + i, ntohl(__raw_readl(&dev->uregs->inbound[i].itofl))); + + return 0; + + exit_10: + return -result; +} + +/* + * Create vme slave window (access: vme -> gcsr) + */ +int tsi148_vme_gcsr_window(unsigned int vmeAddr, int vam) +{ + int result; + unsigned int ctl; + + result = 0; + + if (NULL == dev) { + result = 1; + } else { + __raw_writel(htonl(vmeAddr), &dev->uregs->gbal); + __raw_writel(0x00000000, &dev->uregs->gbau); + + ctl = tsi148_eval_vam(vam); + ctl |= 0x00000080; /* enable */ + __raw_writel(htonl(ctl), &dev->uregs->gcsrat); + } + + return result; +} + +/* + * Create vme slave window (access: vme -> crcsr) + */ +int tsi148_vme_crcsr_window(unsigned int vmeAddr) +{ + int result; + unsigned int ctl; + + result = 0; + + if (NULL == dev) { + result = 1; + } else { + __raw_writel(htonl(vmeAddr), &dev->uregs->crol); + __raw_writel(0x00000000, &dev->uregs->crou); + + ctl = 0x00000080; /* enable */ + __raw_writel(htonl(ctl), &dev->uregs->crat); + } + + return result; +} + + +/* + * Create vme slave window (access: vme -> crg) + */ +int tsi148_vme_crg_window(unsigned int vmeAddr, int vam) +{ + int result; + unsigned int ctl; + + result = 0; + + if (NULL == dev) { + result = 1; + } else { + __raw_writel(htonl(vmeAddr), &dev->uregs->cbal); + __raw_writel(0x00000000, &dev->uregs->cbau); + + ctl = tsi148_eval_vam(vam); + ctl |= 0x00000080; /* enable */ + __raw_writel(htonl(ctl), &dev->uregs->crgat); + } + + return result; +} + +/* + * Tundra Tsi148 configuration + */ +int do_tsi148(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + ulong addr1 = 0, addr2 = 0, size = 0, vam = 0, vdw = 0; + char cmd = 'x'; + + /* get parameter */ + if (argc > 1) + cmd = argv[1][0]; + if (argc > 2) + addr1 = simple_strtoul(argv[2], NULL, 16); + if (argc > 3) + addr2 = simple_strtoul(argv[3], NULL, 16); + if (argc > 4) + size = simple_strtoul(argv[4], NULL, 16); + if (argc > 5) + vam = simple_strtoul(argv[5], NULL, 16); + if (argc > 6) + vdw = simple_strtoul(argv[7], NULL, 16); + + switch (cmd) { + case 'c': + if (strcmp(argv[1], "crg") == 0) { + vam = addr2; + printf("Tsi148: Configuring VME CRG Window (VME->CRG):\n"); + printf(" vme=%08lx vam=%02lx\n", addr1, vam); + tsi148_vme_crg_window(addr1, vam); + } else { + printf("Tsi148: Configuring VME CR/CSR Window (VME->CR/CSR):\n"); + printf(" pci=%08lx\n", addr1); + tsi148_vme_crcsr_window(addr1); + } + break; + case 'i': /* init */ + tsi148_init(); + break; + case 'g': + vam = addr2; + printf("Tsi148: Configuring VME GCSR Window (VME->GCSR):\n"); + printf(" vme=%08lx vam=%02lx\n", addr1, vam); + tsi148_vme_gcsr_window(addr1, vam); + break; + case 'v': /* vme */ + printf("Tsi148: Configuring VME Slave Window (VME->PCI):\n"); + printf(" vme=%08lx pci=%08lx size=%08lx vam=%02lx\n", + addr1, addr2, size, vam); + tsi148_vme_slave_window(addr1, addr2, size, vam); + break; + case 'p': /* pci */ + printf("Tsi148: Configuring PCI Slave Window (PCI->VME):\n"); + printf(" pci=%08lx vme=%08lx size=%08lx vam=%02lx vdw=%02lx\n", + addr1, addr2, size, vam, vdw); + tsi148_pci_slave_window(addr1, addr2, size, vam, vdw); + break; + default: + printf("Tsi148: Command %s not supported!\n", argv[1]); + } + + return 0; +} + +U_BOOT_CMD( + tsi148, 8, 1, do_tsi148, + "tsi148 - initialize and configure Turndra Tsi148\n", + "init\n" + " - initialize tsi148\n" + "tsi148 vme [vme_addr] [pci_addr] [size] [vam]\n" + " - create vme slave window (access: vme->pci)\n" + "tsi148 pci [pci_addr] [vme_addr] [size] [vam] [vdw]\n" + " - create pci slave window (access: pci->vme)\n" + "tsi148 crg [vme_addr] [vam]\n" + " - create vme slave window: (access vme->CRG\n" + "tsi148 crcsr [pci_addr]\n" + " - create vme slave window: (access vme->CR/CSR\n" + "tsi148 gcsr [vme_addr] [vam]\n" + " - create vme slave window: (access vme->GCSR\n" + " [vam] = VMEbus Address-Modifier: 01 -> A16 Address Space\n" + " 02 -> A24 Address Space\n" + " 03 -> A32 Address Space\n" + " 04 -> Usr AM Code\n" + " 08 -> Supervisor AM Code\n" + " 10 -> Data AM Code\n" + " 20 -> Program AM Code\n" + " [vdw] = VMEbus Maximum Datawidth: 02 -> D16 Data Width\n" + " 03 -> D32 Data Width\n" +); diff --git a/include/tsi148.h b/include/tsi148.h new file mode 100644 index 0000000000..8e8e12ba86 --- /dev/null +++ b/include/tsi148.h @@ -0,0 +1,218 @@ +/* + * (C) Copyright 2009 Reinhard Arlt, reinhard.arlt@esd-electronics.com + * + * base on universe.h by + * + * (C) Copyright 2003 Stefan Roese, stefan.roese@esd-electronics.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _tsi148_h +#define _tsi148_h + +#ifndef PCI_DEVICE_ID_TUNDRA_TSI148 +#define PCI_DEVICE_ID_TUNDRA_TSI148 0x0148 +#endif + +typedef struct _TSI148 TSI148; +typedef struct _OUTBOUND OUTBOUND; +typedef struct _INBOUND INBOUND; +typedef struct _TDMA_CMD_PACKET TDMA_CMD_PACKET; + +struct _OUTBOUND { + unsigned int otsau; /* 0x000 Outbound start upper */ + unsigned int otsal; /* 0x004 Outbouud start lower */ + unsigned int oteau; /* 0x008 Outbound end upper */ + unsigned int oteal; /* 0x00c Outbound end lower */ + unsigned int otofu; /* 0x010 Outbound translation upper */ + unsigned int otofl; /* 0x014 Outbound translation lower */ + unsigned int otbs; /* 0x018 Outbound translation 2eSST */ + unsigned int otat; /* 0x01c Outbound translation attr */ +}; + +struct _INBOUND { + unsigned int itsau; /* 0x000 inbound start upper */ + unsigned int itsal; /* 0x004 inbouud start lower */ + unsigned int iteau; /* 0x008 inbound end upper */ + unsigned int iteal; /* 0x00c inbound end lower */ + unsigned int itofu; /* 0x010 inbound translation upper */ + unsigned int itofl; /* 0x014 inbound translation lower */ + unsigned int itat; /* 0x018 inbound translation attr */ + unsigned int spare; /* 0x01c not used */ +}; + +struct _TSI148 { + unsigned int pci_id; /* 0x000 */ + unsigned int pci_csr; /* 0x004 */ + unsigned int pci_class; /* 0x008 */ + unsigned int pci_misc0; /* 0x00c */ + unsigned int pci_mbarl; /* 0x010 */ + unsigned int pci_mbarh; /* 0x014 */ + unsigned int spare0[(0x03c-0x018)/4]; /* 0x018 */ + unsigned int pci_misc1; /* 0x03c */ + unsigned int pci_pcixcap; /* 0x040 */ + unsigned int pci_pcixstat; /* 0x044 */ + unsigned int spare1[(0x100-0x048)/4]; /* 0x048 */ + OUTBOUND outbound[8]; /* 0x100 */ + unsigned int viack[8]; /* 0x204 */ + unsigned int rmwau; /* 0x220 */ + unsigned int rmwal; /* 0x224 */ + unsigned int rmwen; /* 0x228 */ + unsigned int rmwc; /* 0x22c */ + unsigned int rmws; /* 0x230 */ + unsigned int vmctrl; /* 0x234 */ + unsigned int vctrl; /* 0x238 */ + unsigned int vstat; /* 0x23c */ + unsigned int pcsr; /* 0x240 */ + unsigned int spare2[3]; /* 0x244 - 0x24c */ + unsigned int vmefl; /* 0x250 */ + unsigned int spare3[3]; /* 0x254 - 0x25c */ + unsigned int veau; /* 0x260 */ + unsigned int veal; /* 0x264 */ + unsigned int veat; /* 0x268 */ + unsigned int spare4[1]; /* 0x26c */ + unsigned int edpau; /* 0x270 */ + unsigned int edpal; /* 0x274 */ + unsigned int edpxa; /* 0x278 */ + unsigned int edpxs; /* 0x27c */ + unsigned int edpat; /* 0x280 */ + unsigned int spare5[31]; /* 0x284 - 0x2fc */ + INBOUND inbound[8]; /* 0x100 */ + unsigned int gbau; /* 0x400 */ + unsigned int gbal; /* 0x404 */ + unsigned int gcsrat; /* 0x408 */ + unsigned int cbau; /* 0x40c */ + unsigned int cbal; /* 0x410 */ + unsigned int crgat; /* 0x414 */ + unsigned int crou; /* 0x418 */ + unsigned int crol; /* 0x41c */ + unsigned int crat; /* 0x420 */ + unsigned int lmbau; /* 0x424 */ + unsigned int lmbal; /* 0x428 */ + unsigned int lmat; /* 0x42c */ + unsigned int r64bcu; /* 0x430 */ + unsigned int r64bcl; /* 0x434 */ + unsigned int bpgtr; /* 0x438 */ + unsigned int bpctr; /* 0x43c */ + unsigned int vicr; /* 0x440 */ + unsigned int spare6[1]; /* 0x444 */ + unsigned int inten; /* 0x448 */ + unsigned int inteo; /* 0x44c */ + unsigned int ints; /* 0x450 */ + unsigned int intc; /* 0x454 */ + unsigned int intm1; /* 0x458 */ + unsigned int intm2; /* 0x45c */ + unsigned int spare7[40]; /* 0x460 - 0x4fc */ + unsigned int dctl0; /* 0x500 */ + unsigned int dsta0; /* 0x504 */ + unsigned int dcsau0; /* 0x508 */ + unsigned int dcsal0; /* 0x50c */ + unsigned int dcdau0; /* 0x510 */ + unsigned int dcdal0; /* 0x514 */ + unsigned int dclau0; /* 0x518 */ + unsigned int dclal0; /* 0x51c */ + unsigned int dsau0; /* 0x520 */ + unsigned int dsal0; /* 0x524 */ + unsigned int ddau0; /* 0x528 */ + unsigned int ddal0; /* 0x52c */ + unsigned int dsat0; /* 0x530 */ + unsigned int ddat0; /* 0x534 */ + unsigned int dnlau0; /* 0x538 */ + unsigned int dnlal0; /* 0x53c */ + unsigned int dcnt0; /* 0x540 */ + unsigned int ddbs0; /* 0x544 */ + unsigned int r20[14]; /* 0x548 - 0x57c */ + unsigned int dctl1; /* 0x580 */ + unsigned int dsta1; /* 0x584 */ + unsigned int dcsau1; /* 0x588 */ + unsigned int dcsal1; /* 0x58c */ + unsigned int dcdau1; /* 0x590 */ + unsigned int dcdal1; /* 0x594 */ + unsigned int dclau1; /* 0x598 */ + unsigned int dclal1; /* 0x59c */ + unsigned int dsau1; /* 0x5a0 */ + unsigned int dsal1; /* 0x5a4 */ + unsigned int ddau1; /* 0x5a8 */ + unsigned int ddal1; /* 0x5ac */ + unsigned int dsat1; /* 0x5b0 */ + unsigned int ddat1; /* 0x5b4 */ + unsigned int dnlau1; /* 0x5b8 */ + unsigned int dnlal1; /* 0x5bc */ + unsigned int dcnt1; /* 0x5c0 */ + unsigned int ddbs1; /* 0x5c4 */ + unsigned int r21[14]; /* 0x5c8 - 0x5fc */ + unsigned int devi_veni_2; /* 0x600 */ + unsigned int gctrl_ga_revid; /* 0x604 */ + unsigned int semaphore0_1_2_3; /* 0x608 */ + unsigned int semaphore4_5_6_7; /* 0x60c */ + unsigned int mbox0; /* 0x610 */ + unsigned int mbox1; /* 0x614 */ + unsigned int mbox2; /* 0x618 */ + unsigned int mbox3; /* 0x61c */ + unsigned int r22[629]; /* 0x620 - 0xff0 */ + unsigned int csrbcr; /* 0xff4 */ + unsigned int csrbsr; /* 0xff8 */ + unsigned int cbar; /* 0xffc */ +}; + +#define IRQ_VOWN 0x0001 +#define IRQ_VIRQ1 0x0002 +#define IRQ_VIRQ2 0x0004 +#define IRQ_VIRQ3 0x0008 +#define IRQ_VIRQ4 0x0010 +#define IRQ_VIRQ5 0x0020 +#define IRQ_VIRQ6 0x0040 +#define IRQ_VIRQ7 0x0080 +#define IRQ_DMA 0x0100 +#define IRQ_LERR 0x0200 +#define IRQ_VERR 0x0400 +#define IRQ_res 0x0800 +#define IRQ_IACK 0x1000 +#define IRQ_SWINT 0x2000 +#define IRQ_SYSFAIL 0x4000 +#define IRQ_ACFAIL 0x8000 + +struct _TDMA_CMD_PACKET { + unsigned int dctl; /* DMA Control */ + unsigned int dtbc; /* Transfer Byte Count */ + unsigned int dlv; /* PCI Address */ + unsigned int res1; /* Reserved */ + unsigned int dva; /* Vme Address */ + unsigned int res2; /* Reserved */ + unsigned int dcpp; /* Pointer to Numed Cmd Packet with rPN */ + unsigned int res3; /* Reserved */ +}; + +#define VME_AM_A16 0x01 +#define VME_AM_A24 0x02 +#define VME_AM_A32 0x03 +#define VME_AM_Axx 0x03 +#define VME_AM_USR 0x04 +#define VME_AM_SUP 0x08 +#define VME_AM_DATA 0x10 +#define VME_AM_PROG 0x20 +#define VME_AM_Mxx (VME_AM_DATA | VME_AM_PROG) + +#define VME_FLAG_D8 0x01 +#define VME_FLAG_D16 0x02 +#define VME_FLAG_D32 0x03 +#define VME_FLAG_Dxx 0x03 + +#endif