From: Paul Fertser Date: Sun, 15 Mar 2015 07:18:55 +0000 (+0300) Subject: Fix several format specifiers errors exposed by arm-none-eabi X-Git-Tag: v0.9.0-rc1~20 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=5387d616a3d1b4550f9acecda26ead380d37dedf;p=openocd Fix several format specifiers errors exposed by arm-none-eabi Change-Id: I1fe5c5c0b22cc23deedcf13ad5183c957551a1b7 Signed-off-by: Paul Fertser Reviewed-on: http://openocd.zylin.com/2719 Tested-by: jenkins --- diff --git a/src/flash/nor/at91samd.c b/src/flash/nor/at91samd.c index de0f1cc7..e80cf92f 100644 --- a/src/flash/nor/at91samd.c +++ b/src/flash/nor/at91samd.c @@ -976,8 +976,8 @@ COMMAND_HANDLER(samd_handle_bootloader_command) nb = (2 << (8 - size)) * page_size; /* There are 4 pages per row */ - command_print(CMD_CTX, "Bootloader size is %u bytes (%u rows)", - nb, nb / (page_size * 4)); + command_print(CMD_CTX, "Bootloader size is %" PRIu32 " bytes (%" PRIu32 " rows)", + nb, (uint32_t)(nb / (page_size * 4))); } } } diff --git a/src/flash/nor/lpc2000.c b/src/flash/nor/lpc2000.c index 0247e66d..8340aea5 100644 --- a/src/flash/nor/lpc2000.c +++ b/src/flash/nor/lpc2000.c @@ -1450,7 +1450,7 @@ static int lpc2000_auto_probe_flash(struct flash_bank *bank) break; default: - LOG_ERROR("BUG: unknown Part ID encountered: 0x%x", part_id); + LOG_ERROR("BUG: unknown Part ID encountered: 0x%" PRIx32, part_id); exit(-1); } @@ -1472,7 +1472,7 @@ static int lpc2000_probe(struct flash_bank *bank) status = get_lpc2000_part_id(bank, &part_id); if (status == LPC2000_CMD_SUCCESS) LOG_INFO("If auto-detection fails for this part, please email " - "openocd-devel@lists.sourceforge.net, citing part id 0x%x.\n", part_id); + "openocd-devel@lists.sourceforge.net, citing part id 0x%" PRIx32 ".\n", part_id); } lpc2000_build_sector_list(bank); diff --git a/src/flash/nor/nrf51.c b/src/flash/nor/nrf51.c index 34297efb..351a86e4 100644 --- a/src/flash/nor/nrf51.c +++ b/src/flash/nor/nrf51.c @@ -709,7 +709,7 @@ static int nrf51_erase_page(struct flash_bank *bank, LOG_DEBUG("Erasing page at 0x%"PRIx32, sector->offset); if (sector->is_protected) { - LOG_ERROR("Cannot erase protected sector at 0x%x", sector->offset); + LOG_ERROR("Cannot erase protected sector at 0x%" PRIx32, sector->offset); return ERROR_FAIL; } diff --git a/src/flash/nor/sim3x.c b/src/flash/nor/sim3x.c index 867d0caf..7ec00767 100644 --- a/src/flash/nor/sim3x.c +++ b/src/flash/nor/sim3x.c @@ -512,8 +512,8 @@ static int sim3x_flash_write(struct flash_bank *bank, const uint8_t * buffer, ui "for padding buffer"); return ERROR_FAIL; } - LOG_INFO("odd number of bytes to write (%d), extending to %d " - "and padding with 0xff", old_count, count); + LOG_INFO("odd number of bytes to write (%" PRIu32 "), extending to %" PRIu32 + " and padding with 0xff", old_count, count); new_buffer[count - 1] = 0xff; buffer = memcpy(new_buffer, buffer, old_count); diff --git a/src/flash/nor/stellaris.c b/src/flash/nor/stellaris.c index 27b66325..451f19b7 100644 --- a/src/flash/nor/stellaris.c +++ b/src/flash/nor/stellaris.c @@ -507,12 +507,12 @@ static int get_stellaris_info(struct flash_bank *bank, char *buf, int buf_size) printed = snprintf(buf, buf_size, "did1: 0x%8.8" PRIx32 ", arch: 0x%4.4" PRIx32 - ", eproc: %s, ramsize: %ik, flashsize: %ik\n", + ", eproc: %s, ramsize: %" PRIu32 "k, flashsize: %" PRIu32 "k\n", stellaris_info->did1, stellaris_info->did1, "ARMv7M", stellaris_info->sramsiz, - stellaris_info->num_pages * stellaris_info->pagesize / 1024); + (uint32_t)(stellaris_info->num_pages * stellaris_info->pagesize / 1024)); buf += printed; buf_size -= printed; diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c index 3df39f9e..f7e58d08 100644 --- a/src/target/arm_adi_v5.c +++ b/src/target/arm_adi_v5.c @@ -992,7 +992,7 @@ static int dap_rom_display(struct command_context *cmd_ctx, uint32_t c_cid0, c_cid1, c_cid2, c_cid3; uint32_t c_pid0, c_pid1, c_pid2, c_pid3, c_pid4; uint32_t component_base; - unsigned part_num; + uint32_t part_num; const char *type, *full; component_base = (dbgbase & 0xFFFFF000) + (romentry & 0xFFFFF000); diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c index 7ecf428d..ed9b2b29 100644 --- a/src/target/cortex_a.c +++ b/src/target/cortex_a.c @@ -238,7 +238,7 @@ static int cortex_a_init_debug_access(struct target *target) the registers in the Core Power Domain */ retval = mem_ap_sel_read_atomic_u32(swjdp, armv7a->debug_ap, armv7a->debug_base + CPUDBG_PRSR, &dbg_osreg); - LOG_DEBUG("target->coreid %d DBGPRSR 0x%x ", target->coreid, dbg_osreg); + LOG_DEBUG("target->coreid %" PRId32 " DBGPRSR 0x%" PRIx32, target->coreid, dbg_osreg); if (retval != ERROR_OK) return retval; @@ -2954,7 +2954,7 @@ static int cortex_a_examine_first(struct target *target) if (retval != ERROR_OK) return retval; - LOG_DEBUG("target->coreid %d DBGPRSR 0x%" PRIx32, target->coreid, dbg_osreg); + LOG_DEBUG("target->coreid %" PRId32 " DBGPRSR 0x%" PRIx32, target->coreid, dbg_osreg); armv7a->arm.core_type = ARM_MODE_MON; retval = cortex_a_dpm_setup(cortex_a, didr); diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c index f6cd4510..2a16193f 100644 --- a/src/target/mips_ejtag.c +++ b/src/target/mips_ejtag.c @@ -352,9 +352,9 @@ static void ejtag_v20_print_imp(struct mips_ejtag *ejtag_info) EJTAG_IMP_HAS(EJTAG_V20_IMP_NOPB) ? " noPB" : " PB", EJTAG_IMP_HAS(EJTAG_V20_IMP_NODB) ? " noDB" : " DB", EJTAG_IMP_HAS(EJTAG_V20_IMP_NOIB) ? " noIB" : " IB"); - LOG_DEBUG("EJTAG v2.0: Break Channels: %i", - (ejtag_info->impcode >> EJTAG_V20_IMP_BCHANNELS_SHIFT) & - EJTAG_V20_IMP_BCHANNELS_MASK); + LOG_DEBUG("EJTAG v2.0: Break Channels: %" PRIu8, + (uint8_t)((ejtag_info->impcode >> EJTAG_V20_IMP_BCHANNELS_SHIFT) & + EJTAG_V20_IMP_BCHANNELS_MASK)); } static void ejtag_v26_print_imp(struct mips_ejtag *ejtag_info)