From: Andreas Fritiofson Date: Sun, 6 Dec 2015 23:05:16 +0000 (+0100) Subject: arm_adi_v5: dap_queue_ap_* DAP->AP parameter X-Git-Tag: v0.10.0-rc1~302 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=54e89cae84ad513d244d6203de7c20652caa3b38;p=openocd arm_adi_v5: dap_queue_ap_* DAP->AP parameter Move the mandatory dap_ap_select() call into the dap_queue_ap_read/write wrapper. This avoids the need for dap_ap_select() and the notion of a "current" AP within target code. Change-Id: I5cde8f3eef2c662f7458be6f3b3dd44ea693bd74 Signed-off-by: Andreas Fritiofson Reviewed-on: http://openocd.zylin.com/3164 Tested-by: jenkins Reviewed-by: Matthias Welwarsky --- diff --git a/src/flash/nor/kinetis.c b/src/flash/nor/kinetis.c index c248b052..d618cfdd 100644 --- a/src/flash/nor/kinetis.c +++ b/src/flash/nor/kinetis.c @@ -245,9 +245,7 @@ static int kinetis_mdm_write_register(struct adiv5_dap *dap, unsigned reg, uint3 int retval; LOG_DEBUG("MDM_REG[0x%02x] <- %08" PRIX32, reg, value); - dap_ap_select(dap, 1); - - retval = dap_queue_ap_write(dap, reg, value); + retval = dap_queue_ap_write(dap_ap(dap, 1), reg, value); if (retval != ERROR_OK) { LOG_DEBUG("MDM: failed to queue a write request"); return retval; @@ -267,9 +265,7 @@ static int kinetis_mdm_read_register(struct adiv5_dap *dap, unsigned reg, uint32 { int retval; - dap_ap_select(dap, 1); - - retval = dap_queue_ap_read(dap, reg, result); + retval = dap_queue_ap_read(dap_ap(dap, 1), reg, result); if (retval != ERROR_OK) { LOG_DEBUG("MDM: failed to queue a read request"); return retval; diff --git a/src/flash/nor/sim3x.c b/src/flash/nor/sim3x.c index e30ca454..df4e19c2 100644 --- a/src/flash/nor/sim3x.c +++ b/src/flash/nor/sim3x.c @@ -893,9 +893,7 @@ static int ap_write_register(struct adiv5_dap *dap, unsigned reg, uint32_t value int retval; LOG_DEBUG("DAP_REG[0x%02x] <- %08" PRIX32, reg, value); - dap_ap_select(dap, SIM3X_AP); - - retval = dap_queue_ap_write(dap, reg, value); + retval = dap_queue_ap_write(dap_ap(dap, SIM3X_AP), reg, value); if (retval != ERROR_OK) { LOG_DEBUG("DAP: failed to queue a write request"); return retval; @@ -914,9 +912,7 @@ static int ap_read_register(struct adiv5_dap *dap, unsigned reg, uint32_t *resul { int retval; - dap_ap_select(dap, SIM3X_AP); - - retval = dap_queue_ap_read(dap, reg, result); + retval = dap_queue_ap_read(dap_ap(dap, SIM3X_AP), reg, result); if (retval != ERROR_OK) { LOG_DEBUG("DAP: failed to queue a read request"); return retval; diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c index 26948a40..e56f595b 100644 --- a/src/target/arm_adi_v5.c +++ b/src/target/arm_adi_v5.c @@ -123,7 +123,7 @@ static int mem_ap_setup_csw(struct adiv5_ap *ap, uint32_t csw) if (csw != ap->csw_value) { /* LOG_DEBUG("DAP: Set CSW %x",csw); */ - int retval = dap_queue_ap_write(ap->dap, MEM_AP_REG_CSW, csw); + int retval = dap_queue_ap_write(ap, MEM_AP_REG_CSW, csw); if (retval != ERROR_OK) return retval; ap->csw_value = csw; @@ -136,7 +136,7 @@ static int mem_ap_setup_tar(struct adiv5_ap *ap, uint32_t tar) if (tar != ap->tar_value || (ap->csw_value & CSW_ADDRINC_MASK)) { /* LOG_DEBUG("DAP: Set TAR %x",tar); */ - int retval = dap_queue_ap_write(ap->dap, MEM_AP_REG_TAR, tar); + int retval = dap_queue_ap_write(ap, MEM_AP_REG_TAR, tar); if (retval != ERROR_OK) return retval; ap->tar_value = tar; @@ -189,8 +189,6 @@ int mem_ap_read_u32(struct adiv5_ap *ap, uint32_t address, { int retval; - dap_ap_select(ap->dap, ap->ap_num); - /* Use banked addressing (REG_BDx) to avoid some link traffic * (updating TAR) when reading several consecutive addresses. */ @@ -199,7 +197,7 @@ int mem_ap_read_u32(struct adiv5_ap *ap, uint32_t address, if (retval != ERROR_OK) return retval; - return dap_queue_ap_read(ap->dap, MEM_AP_REG_BD0 | (address & 0xC), value); + return dap_queue_ap_read(ap, MEM_AP_REG_BD0 | (address & 0xC), value); } /** @@ -242,8 +240,6 @@ int mem_ap_write_u32(struct adiv5_ap *ap, uint32_t address, { int retval; - dap_ap_select(ap->dap, ap->ap_num); - /* Use banked addressing (REG_BDx) to avoid some link traffic * (updating TAR) when writing several consecutive addresses. */ @@ -252,7 +248,7 @@ int mem_ap_write_u32(struct adiv5_ap *ap, uint32_t address, if (retval != ERROR_OK) return retval; - return dap_queue_ap_write(ap->dap, MEM_AP_REG_BD0 | (address & 0xC), + return dap_queue_ap_write(ap, MEM_AP_REG_BD0 | (address & 0xC), value); } @@ -329,8 +325,6 @@ static int mem_ap_write(struct adiv5_ap *ap, const uint8_t *buffer, uint32_t siz if (ap->unaligned_access_bad && (address % size != 0)) return ERROR_TARGET_UNALIGNED_ACCESS; - dap_ap_select(ap->dap, ap->ap_num); - retval = mem_ap_setup_tar(ap, address ^ addr_xor); if (retval != ERROR_OK) return retval; @@ -383,7 +377,7 @@ static int mem_ap_write(struct adiv5_ap *ap, const uint8_t *buffer, uint32_t siz nbytes -= this_size; - retval = dap_queue_ap_write(dap, MEM_AP_REG_DRW, outvalue); + retval = dap_queue_ap_write(ap, MEM_AP_REG_DRW, outvalue); if (retval != ERROR_OK) break; @@ -401,7 +395,7 @@ static int mem_ap_write(struct adiv5_ap *ap, const uint8_t *buffer, uint32_t siz if (retval != ERROR_OK) { uint32_t tar; - if (dap_queue_ap_read(dap, MEM_AP_REG_TAR, &tar) == ERROR_OK + if (dap_queue_ap_read(ap, MEM_AP_REG_TAR, &tar) == ERROR_OK && dap_run(dap) == ERROR_OK) LOG_ERROR("Failed to write memory at 0x%08"PRIx32, tar); else @@ -462,8 +456,6 @@ static int mem_ap_read(struct adiv5_ap *ap, uint8_t *buffer, uint32_t size, uint return ERROR_FAIL; } - dap_ap_select(ap->dap, ap->ap_num); - retval = mem_ap_setup_tar(ap, address); if (retval != ERROR_OK) { free(read_buf); @@ -487,7 +479,7 @@ static int mem_ap_read(struct adiv5_ap *ap, uint8_t *buffer, uint32_t size, uint if (retval != ERROR_OK) break; - retval = dap_queue_ap_read(dap, MEM_AP_REG_DRW, read_ptr++); + retval = dap_queue_ap_read(ap, MEM_AP_REG_DRW, read_ptr++); if (retval != ERROR_OK) break; @@ -514,7 +506,7 @@ static int mem_ap_read(struct adiv5_ap *ap, uint8_t *buffer, uint32_t size, uint * at least give the caller what we have. */ if (retval != ERROR_OK) { uint32_t tar; - if (dap_queue_ap_read(dap, MEM_AP_REG_TAR, &tar) == ERROR_OK + if (dap_queue_ap_read(ap, MEM_AP_REG_TAR, &tar) == ERROR_OK && dap_run(dap) == ERROR_OK) { LOG_ERROR("Failed to read memory at 0x%08"PRIx32, tar); if (nbytes > tar - address) @@ -719,17 +711,15 @@ int mem_ap_init(struct adiv5_ap *ap) int retval; struct adiv5_dap *dap = ap->dap; - dap_ap_select(dap, ap->ap_num); - retval = mem_ap_setup_transfer(ap, CSW_8BIT | CSW_ADDRINC_PACKED, 0); if (retval != ERROR_OK) return retval; - retval = dap_queue_ap_read(dap, MEM_AP_REG_CSW, &csw); + retval = dap_queue_ap_read(ap, MEM_AP_REG_CSW, &csw); if (retval != ERROR_OK) return retval; - retval = dap_queue_ap_read(dap, MEM_AP_REG_CFG, &cfg); + retval = dap_queue_ap_read(ap, MEM_AP_REG_CFG, &cfg); if (retval != ERROR_OK) return retval; @@ -793,9 +783,8 @@ int dap_find_ap(struct adiv5_dap *dap, enum ap_type type_to_find, struct adiv5_a /* read the IDR register of the Access Port */ uint32_t id_val = 0; - dap_ap_select(dap, ap_num); - int retval = dap_queue_ap_read(dap, AP_REG_IDR, &id_val); + int retval = dap_queue_ap_read(dap_ap(dap, ap_num), AP_REG_IDR, &id_val); if (retval != ERROR_OK) return retval; @@ -844,12 +833,10 @@ int dap_get_debugbase(struct adiv5_ap *ap, struct adiv5_dap *dap = ap->dap; int retval; - dap_ap_select(dap, ap->ap_num); - - retval = dap_queue_ap_read(dap, MEM_AP_REG_BASE, dbgbase); + retval = dap_queue_ap_read(ap, MEM_AP_REG_BASE, dbgbase); if (retval != ERROR_OK) return retval; - retval = dap_queue_ap_read(dap, AP_REG_IDR, apid); + retval = dap_queue_ap_read(ap, AP_REG_IDR, apid); if (retval != ERROR_OK) return retval; retval = dap_run(dap); @@ -1485,14 +1472,12 @@ COMMAND_HANDLER(dap_baseaddr_command) return ERROR_COMMAND_SYNTAX_ERROR; } - dap_ap_select(dap, apsel); - /* NOTE: assumes we're talking to a MEM-AP, which * has a base address. There are other kinds of AP, * though they're not common for now. This should * use the ID register to verify it's a MEM-AP. */ - retval = dap_queue_ap_read(dap, MEM_AP_REG_BASE, &baseaddr); + retval = dap_queue_ap_read(dap_ap(dap, apsel), MEM_AP_REG_BASE, &baseaddr); if (retval != ERROR_OK) return retval; retval = dap_run(dap); @@ -1554,9 +1539,8 @@ COMMAND_HANDLER(dap_apsel_command) } dap->apsel = apsel; - dap_ap_select(dap, apsel); - retval = dap_queue_ap_read(dap, AP_REG_IDR, &apid); + retval = dap_queue_ap_read(dap_ap(dap, apsel), AP_REG_IDR, &apid); if (retval != ERROR_OK) return retval; retval = dap_run(dap); @@ -1625,9 +1609,7 @@ COMMAND_HANDLER(dap_apid_command) return ERROR_COMMAND_SYNTAX_ERROR; } - dap_ap_select(dap, apsel); - - retval = dap_queue_ap_read(dap, AP_REG_IDR, &apid); + retval = dap_queue_ap_read(dap_ap(dap, apsel), AP_REG_IDR, &apid); if (retval != ERROR_OK) return retval; retval = dap_run(dap); diff --git a/src/target/arm_adi_v5.h b/src/target/arm_adi_v5.h index d5fba3bb..63d7f286 100644 --- a/src/target/arm_adi_v5.h +++ b/src/target/arm_adi_v5.h @@ -302,6 +302,9 @@ enum ap_type { AP_TYPE_AXI_AP = 0x4, /* AXI Memory-AP */ }; +/* AP selection applies to future AP transactions */ +void dap_ap_select(struct adiv5_dap *dap, uint8_t ap); + /** * Queue a DP register read. * Note that not all DP registers are readable; also, that JTAG and SWD @@ -342,34 +345,36 @@ static inline int dap_queue_dp_write(struct adiv5_dap *dap, /** * Queue an AP register read. * - * @param dap The DAP used for reading. + * @param ap The AP used for reading. * @param reg The number of the AP register being read. * @param data Pointer saying where to store the register's value * (in host endianness). * * @return ERROR_OK for success, else a fault code. */ -static inline int dap_queue_ap_read(struct adiv5_dap *dap, +static inline int dap_queue_ap_read(struct adiv5_ap *ap, unsigned reg, uint32_t *data) { - assert(dap->ops != NULL); - return dap->ops->queue_ap_read(dap, reg, data); + assert(ap->dap->ops != NULL); + dap_ap_select(ap->dap, ap->ap_num); + return ap->dap->ops->queue_ap_read(ap->dap, reg, data); } /** * Queue an AP register write. * - * @param dap The DAP used for writing. + * @param ap The AP used for writing. * @param reg The number of the AP register being written. * @param data Value being written (host endianness) * * @return ERROR_OK for success, else a fault code. */ -static inline int dap_queue_ap_write(struct adiv5_dap *dap, +static inline int dap_queue_ap_write(struct adiv5_ap *ap, unsigned reg, uint32_t data) { - assert(dap->ops != NULL); - return dap->ops->queue_ap_write(dap, reg, data); + assert(ap->dap->ops != NULL); + dap_ap_select(ap->dap, ap->ap_num); + return ap->dap->ops->queue_ap_write(ap->dap, reg, data); } /** @@ -452,9 +457,6 @@ static inline uint8_t dap_ap_get_select(struct adiv5_dap *swjdp) return (uint8_t)(swjdp->ap_current >> 24); } -/* AP selection applies to future AP transactions */ -void dap_ap_select(struct adiv5_dap *dap, uint8_t ap); - /* Queued MEM-AP memory mapped single word transfers. */ int mem_ap_read_u32(struct adiv5_ap *ap, uint32_t address, uint32_t *value); @@ -495,6 +497,11 @@ int dap_find_ap(struct adiv5_dap *dap, enum ap_type type_to_find, struct adiv5_ap **ap_out); +static inline struct adiv5_ap *dap_ap(struct adiv5_dap *dap, uint8_t ap_num) +{ + return &dap->ap[ap_num]; +} + /* Lookup CoreSight component */ int dap_lookup_cs_component(struct adiv5_ap *ap, uint32_t dbgbase, uint8_t type, uint32_t *addr, int32_t *idx);