From: Daniel Schwierzeck Date: Mon, 18 Jul 2016 12:10:37 +0000 (+0200) Subject: mtd: cfi_flash: fix polling for bit XSR.7 on Intel chips X-Git-Tag: v2016.09-rc1~75 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=55edb9d4d521ff733d217ddf47ad7bf4650676be;p=u-boot mtd: cfi_flash: fix polling for bit XSR.7 on Intel chips flash_full_status_check() checks bit XSR.7 on Intel chips. This should be done by only checking bit 7 and not by comparing the whole status byte or word with 0x80. This fixes the non-working block erase in the pflash emulation of Qemu when used with the MIPS Malta board. MIPS Malta uses x32 mode to access the pflash device. In x32 mode Qemu mirrors the lower 16 bits of the status word into the upper 16 bits. Thus the CFI driver gets a status word of 0x8080 in x32 mode. If flash_full_status_check() uses flash_isequal(), then it polls for XSR.7 by comparing 0x8080 with 0x80 which never becomes true. Reported-by: Alon Bar-Lev Signed-off-by: Daniel Schwierzeck Signed-off-by: Stefan Roese --- diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 8ccaff0e63..33c4a9342f 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -608,7 +608,7 @@ static int flash_full_status_check (flash_info_t * info, flash_sect_t sector, case CFI_CMDSET_INTEL_EXTENDED: case CFI_CMDSET_INTEL_STANDARD: if ((retcode == ERR_OK) - && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) { + && !flash_isset(info, sector, 0, FLASH_STATUS_DONE)) { retcode = ERR_INVAL; printf ("Flash %s error at address %lx\n", prompt, info->start[sector]);