From: Stefano Babic <sbabic@denx.de>
Date: Thu, 19 Jul 2012 23:00:02 +0000 (+0000)
Subject: MPC83xx, MPC85xx: compile stub cache function
X-Git-Tag: v2012.07-rc2~5
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=569fadcd74ff2c7b456dfaa368b9f6144bc7ab3a;p=u-boot

MPC83xx, MPC85xx: compile stub cache function

An empty flush_dcache_range() was added into MPC83xx and MPC85xx to
work with drivers shared with other architecture.  However, it is
compiled only if USB is set, but it is required for other drivers
(FSL_ESDHC), too.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Andy Fleming <afleming@gmail.com>
CC: Dirk Behme <dirk.behme@de.bosch.com>
CC: Marek Vasut <marex@denx.de>
CC: Wolfgang Denk <wd@denx.de>

Added MPC83xx version.

Signed-off-by: Wolfgang Denk <wd@denx.de>
---

diff --git a/arch/powerpc/cpu/mpc83xx/Makefile b/arch/powerpc/cpu/mpc83xx/Makefile
index 012ab6b020..687f5e90a4 100644
--- a/arch/powerpc/cpu/mpc83xx/Makefile
+++ b/arch/powerpc/cpu/mpc83xx/Makefile
@@ -42,7 +42,7 @@ COBJS-$(CONFIG_PCIE) += pcie.o
 COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
 
 # Stub implementations of cache management functions for USB
-COBJS-$(CONFIG_USB_EHCI) += cache.o
+COBJS-y += cache.o
 
 ifdef CONFIG_FSL_DDR2
 COBJS_LN-$(CONFIG_MPC8349) += ddr-gen2.o
diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile
index 7d65aa7363..34f6c54698 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -131,7 +131,7 @@ COBJS	+= tlb.o
 COBJS	+= traps.o
 
 # Stub implementations of cache management functions for USB
-COBJS-$(CONFIG_USB_EHCI) += cache.o
+COBJS += cache.o
 
 SRCS	:= $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))