From: Jagan Teki <jagan@amarulasolutions.com>
Date: Tue, 6 Jun 2017 05:31:47 +0000 (+0000)
Subject: serial: mxc: Move cr1 and cr2 write to mxc_serial_setbrg
X-Git-Tag: v2017.09-rc1~190^2~29
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=57d3e98f570a8d4cd0dac9c738d4574e00872d90;p=u-boot

serial: mxc: Move cr1 and cr2 write to mxc_serial_setbrg

Control reg write should be part of setbrg for better
buadrate generation, so move cr1 and cr2 write to
mxc_serial_setbrg

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---

diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c
index fbf8e51591..cf6f0447f2 100644
--- a/drivers/serial/serial_mxc.c
+++ b/drivers/serial/serial_mxc.c
@@ -162,6 +162,9 @@ static void mxc_serial_setbrg(void)
 	writel(0xf, &mxc_base->bir);
 	writel(clk / (2 * gd->baudrate), &mxc_base->bmr);
 
+	writel(UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST,
+	       &mxc_base->cr2);
+	writel(UCR1_UARTEN, &mxc_base->cr1);
 }
 
 static int mxc_serial_getc(void)
@@ -216,11 +219,6 @@ static int mxc_serial_init(void)
 
 	serial_setbrg();
 
-	writel(UCR2_WS | UCR2_IRTS | UCR2_RXEN | UCR2_TXEN | UCR2_SRST,
-	       &mxc_base->cr2);
-
-	writel(UCR1_UARTEN, &mxc_base->cr1);
-
 	return 0;
 }