From: Jagan Teki <jagan@amarulasolutions.com>
Date: Fri, 24 Feb 2017 10:02:57 +0000 (+0530)
Subject: arm: dts: imx6ul-isiot: Add FEC node
X-Git-Tag: v2017.05-rc1~49^2~52
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=580a7d692bb07a855b0a86a6b34b0143e82849b7;p=u-boot

arm: dts: imx6ul-isiot: Add FEC node

Add FEC node for Engicam Is.IoT MX6UL module.

Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---

diff --git a/arch/arm/dts/imx6ul-isiot.dtsi b/arch/arm/dts/imx6ul-isiot.dtsi
index 1a474ca217..346079ac32 100644
--- a/arch/arm/dts/imx6ul-isiot.dtsi
+++ b/arch/arm/dts/imx6ul-isiot.dtsi
@@ -56,6 +56,13 @@
 	};
 };
 
+&fec1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_enet1>;
+	phy-mode = "rmii";
+	status = "okay";
+};
+
 &i2c1 {
 	clock-frequency = <100000>;
 	pinctrl-names = "default";
@@ -86,6 +93,21 @@
 };
 
 &iomuxc {
+	pinctrl_enet1: enet1grp {
+		fsl,pins = <
+			MX6UL_PAD_ENET2_RX_DATA0__ENET1_MDIO    0x1b0b0
+			MX6UL_PAD_ENET2_RX_DATA1__ENET1_MDC     0x1b0b0
+			MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN      0x1b0b0
+			MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
+			MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
+			MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN      0x1b0b0
+			MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
+			MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
+			MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1  0x4001b031
+			MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10       0x1b0b0
+		>;
+	};
+
 	pinctrl_i2c1: i2c1grp {
 		fsl,pins = <
 			MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0