From: rtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>
Date: Sat, 7 Jul 2018 21:54:41 +0000 (+0000)
Subject: Update RISC-V project to used official port stubs in place of third party port.
X-Git-Tag: V10.1.0~7
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=58674a2c755358fb88b0ec38d769f395aa0dc6ea;p=freertos

Update RISC-V project to used official port stubs in place of third party port.

git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@2558 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
---

diff --git a/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/.cproject b/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/.cproject
index c1655cff0..478607546 100644
--- a/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/.cproject
+++ b/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/.cproject
@@ -49,7 +49,7 @@
 							<tool command="${cross_prefix}${cross_c}${cross_suffix}" commandLinePattern="${COMMAND} ${cross_toolchain_flags} ${FLAGS} -c ${OUTPUT_FLAG} ${OUTPUT_PREFIX}${OUTPUT} ${INPUTS}" errorParsers="org.eclipse.cdt.core.GLDErrorParser;org.eclipse.cdt.core.GCCErrorParser" id="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler.894708922" name="GNU RISC-V Cross C Compiler" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.tool.c.compiler">
 								<option id="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.include.paths.1818715770" name="Include paths (-I)" superClass="ilg.gnumcueclipse.managedbuild.cross.riscv.option.c.compiler.include.paths" useByScannerDiscovery="true" valueType="includePath">
 									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS_Source/include}&quot;"/>
-									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS_Source/portable/ThirdParty/GCC/RISC-V}&quot;"/>
+									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/FreeRTOS_Source/portable/GCC/RISC-V-RV32}&quot;"/>
 									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}}&quot;"/>
 									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/drivers/CoreGPIO}&quot;"/>
 									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/drivers/Core16550}&quot;"/>
diff --git a/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/.project b/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/.project
index f7313f56f..d89cebcba 100644
--- a/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/.project
+++ b/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/.project
@@ -104,16 +104,16 @@
 			</matcher>
 		</filter>
 		<filter>
-			<id>1529524475525</id>
+			<id>1531000165521</id>
 			<name>FreeRTOS_Source/portable</name>
 			<type>9</type>
 			<matcher>
 				<id>org.eclipse.ui.ide.multiFilter</id>
-				<arguments>1.0-name-matches-false-false-ThirdParty</arguments>
+				<arguments>1.0-name-matches-false-false-GCC</arguments>
 			</matcher>
 		</filter>
 		<filter>
-			<id>1529524475530</id>
+			<id>1531000165526</id>
 			<name>FreeRTOS_Source/portable</name>
 			<type>9</type>
 			<matcher>
@@ -122,30 +122,21 @@
 			</matcher>
 		</filter>
 		<filter>
-			<id>1529524494421</id>
-			<name>FreeRTOS_Source/portable/MemMang</name>
-			<type>5</type>
-			<matcher>
-				<id>org.eclipse.ui.ide.multiFilter</id>
-				<arguments>1.0-name-matches-false-false-heap_4.c</arguments>
-			</matcher>
-		</filter>
-		<filter>
-			<id>1529524515837</id>
-			<name>FreeRTOS_Source/portable/ThirdParty</name>
+			<id>1531000203197</id>
+			<name>FreeRTOS_Source/portable/GCC</name>
 			<type>9</type>
 			<matcher>
 				<id>org.eclipse.ui.ide.multiFilter</id>
-				<arguments>1.0-name-matches-false-false-GCC</arguments>
+				<arguments>1.0-name-matches-false-false-RISC-V-RV32</arguments>
 			</matcher>
 		</filter>
 		<filter>
-			<id>1529524627661</id>
-			<name>FreeRTOS_Source/portable/ThirdParty/GCC</name>
-			<type>9</type>
+			<id>1529524494421</id>
+			<name>FreeRTOS_Source/portable/MemMang</name>
+			<type>5</type>
 			<matcher>
 				<id>org.eclipse.ui.ide.multiFilter</id>
-				<arguments>1.0-name-matches-false-false-RISC-V</arguments>
+				<arguments>1.0-name-matches-false-false-heap_4.c</arguments>
 			</matcher>
 		</filter>
 	</filteredResources>
diff --git a/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/.settings/language.settings.xml b/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/.settings/language.settings.xml
index 6dc13a6a3..55a4eb27b 100644
--- a/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/.settings/language.settings.xml
+++ b/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/.settings/language.settings.xml
@@ -5,7 +5,7 @@
 			<provider copy-of="extension" id="org.eclipse.cdt.ui.UserLanguageSettingsProvider"/>
 			<provider-reference id="org.eclipse.cdt.core.ReferencedProjectsLanguageSettingsProvider" ref="shared-provider"/>
 			<provider-reference id="org.eclipse.cdt.managedbuilder.core.MBSLanguageSettingsProvider" ref="shared-provider"/>
-			<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="886405286544253612" id="ilg.gnumcueclipse.managedbuild.cross.riscv.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT RISC-V Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
+			<provider class="org.eclipse.cdt.managedbuilder.language.settings.providers.GCCBuiltinSpecsDetector" console="false" env-hash="-1033716199933845767" id="ilg.gnumcueclipse.managedbuild.cross.riscv.GCCBuiltinSpecsDetector" keep-relative-paths="false" name="CDT RISC-V Cross GCC Built-in Compiler Settings" parameter="${COMMAND} ${FLAGS} ${cross_toolchain_flags} -E -P -v -dD &quot;${INPUTS}&quot;" prefer-non-shared="true">
 				<language-scope id="org.eclipse.cdt.core.gcc"/>
 				<language-scope id="org.eclipse.cdt.core.g++"/>
 			</provider>
diff --git a/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/FreeRTOSConfig.h b/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/FreeRTOSConfig.h
index 0cd797d12..389ddafa1 100644
--- a/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/FreeRTOSConfig.h
+++ b/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/FreeRTOSConfig.h
@@ -87,13 +87,12 @@
 #include <stdint.h>
 #include <string.h>
 #include "riscv_plic.h"
-
-extern uint32_t SystemCoreClock;
+#include "hw_platform.h"
 
 #define configUSE_PREEMPTION			1
-#define configUSE_IDLE_HOOK				1
+#define configUSE_IDLE_HOOK				0
 #define configUSE_TICK_HOOK				0
-#define configCPU_CLOCK_HZ			( ( unsigned long ) 83000000 )
+#define configCPU_CLOCK_HZ			( ( unsigned long ) ( SYS_CLK_FREQ / 100UL ) ) /*_RB_ Seems to be a factor of 100 between machine timer frequency and CPU frequency. */
 #define configTICK_RATE_HZ			( ( TickType_t ) 1000 )
 #define configMAX_PRIORITIES		( 5 )
 #define configMINIMAL_STACK_SIZE	( ( unsigned short ) 1024 )
@@ -104,7 +103,7 @@ extern uint32_t SystemCoreClock;
 #define configIDLE_SHOULD_YIELD			1
 #define configUSE_MUTEXES				1
 #define configQUEUE_REGISTRY_SIZE		8
-#define configCHECK_FOR_STACK_OVERFLOW	0 //2
+#define configCHECK_FOR_STACK_OVERFLOW	2
 #define configUSE_RECURSIVE_MUTEXES		1
 #define configUSE_MALLOC_FAILED_HOOK	1
 #define configUSE_APPLICATION_TASK_TAG	0
diff --git a/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/hw_platform.h b/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/hw_platform.h
index 268eba61f..c6d2aa4be 100644
--- a/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/hw_platform.h
+++ b/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/hw_platform.h
@@ -34,7 +34,7 @@
  * This is the only clock brought over from the Mi-V Soft processor Libero design.
  */
 #ifndef SYS_CLK_FREQ
-#define SYS_CLK_FREQ                    83000000UL
+#define SYS_CLK_FREQ                    50000000UL
 #endif
 
 /***************************************************************************//**
diff --git a/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/main.c b/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/main.c
index 4ec3a71ad..c1582b7cb 100644
--- a/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/main.c
+++ b/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/main.c
@@ -4,12 +4,25 @@
 #include "timers.h"
 
 #include "hw_platform.h"
+#include "riscv_hal.h"
+#include "hal.h"
+#include "core_gpio.h"
+#include "core_timer.h"
 #include "core_uart_apb.h"
-#include "task.h"
 
 const char * g_hello_msg = "\r\nFreeRTOS Example\r\n";
 
 
+/*
+ * Notes:
+ * + Program the device using the flash project in
+ *   MS-RISC-V\M2GL025-Creative-Board\Programming_The_Target_Device\PROC_SUBSYSTEM_MIV_RV32IMA_BaseDesign.
+ *   See https://github.com/RISCV-on-Microsemi-FPGA/M2GL025-Creative-Board.
+ * + Above referenced image sets the clock to 50MHz. *
+ * + Debug configuration is critical.
+ */
+
+
 /* A block time of zero simply means "don't block". */
 #define mainDONT_BLOCK						( 0UL )
 
@@ -37,11 +50,22 @@ void vApplicationIdleHook( void );
  */
 void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName );
 
+/*_RB_
+gpio_instance_t g_gpio0;
+gpio_instance_t g_gpio1;
+timer_instance_t g_timer0;
+timer_instance_t g_timer1;
+
+
 /*-----------------------------------------------------------*/
+extern uint32_t SysTick_Config(uint32_t ticks);
+extern void __enable_irq(void);
 
 int main( void )
 {
     PLIC_init();
+//_RB_    GPIO_init(&g_gpio0, COREGPIO_IN_BASE_ADDR, GPIO_APB_32_BITS_BUS);
+//_RB_    GPIO_init(&g_gpio1, COREGPIO_OUT_BASE_ADDR, GPIO_APB_32_BITS_BUS);
 
     /**************************************************************************
     * Initialize CoreUART with its base address, baud value, and line
@@ -55,7 +79,7 @@ int main( void )
 
     /* Create the two test tasks. */
 	xTaskCreate( vUartTestTask1, "UArt1", 1000, NULL, uartPRIMARY_PRIORITY, NULL );
-	xTaskCreate( vUartTestTask2, "UArt2", 1000, NULL, uartPRIMARY_PRIORITY, NULL );
+//	xTaskCreate( vUartTestTask2, "UArt2", 1000, NULL, uartPRIMARY_PRIORITY, NULL );
 
 	/* Start the kernel.  From here on, only tasks and interrupts will run. */
 	vTaskStartScheduler();
@@ -117,7 +141,7 @@ static void vUartTestTask1( void *pvParameters )
 	for( ;; )
 	{
 		UART_polled_tx_string( &g_uart, (const uint8_t *)"Task - 1\r\n" );
-	    vTaskDelay(10);
+	    vTaskDelay( pdMS_TO_TICKS( 100 ) );
 	}
 }
 
@@ -130,7 +154,7 @@ static void vUartTestTask2( void *pvParameters )
 
 	for( ;; )
 	{
-		UART_polled_tx_string( &g_uart, (const uint8_t *)"Task - 2\r\n" );
+//		UART_polled_tx_string( &g_uart, (const uint8_t *)"Task - 2\r\n" );
 	    vTaskDelay(5);
 	}
 }
diff --git a/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/riscv_hal/sample_hw_platform.h b/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/riscv_hal/sample_hw_platform.h
index 2990bd0c0..d0604a1b0 100644
--- a/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/riscv_hal/sample_hw_platform.h
+++ b/FreeRTOS/Demo/RISC-V_IGLOO2_Creative_SoftConsole/riscv_hal/sample_hw_platform.h
@@ -44,6 +44,7 @@
  * <corename>_<instance>_BASE_ADDR
  */
 #define COREUARTAPB0_BASE_ADDR          0x70001000UL
+#define COREGPIO_BASE_ADDR              0x70002000UL
 #define COREGPIO_IN_BASE_ADDR           0x70002000UL
 #define CORETIMER0_BASE_ADDR            0x70003000UL
 #define CORETIMER1_BASE_ADDR            0x70004000UL
diff --git a/FreeRTOS/Source/portable/GCC/RISC-V-RV32/port.c b/FreeRTOS/Source/portable/GCC/RISC-V-RV32/port.c
index f14c58ce3..0de072a32 100644
--- a/FreeRTOS/Source/portable/GCC/RISC-V-RV32/port.c
+++ b/FreeRTOS/Source/portable/GCC/RISC-V-RV32/port.c
@@ -50,13 +50,15 @@ static void prvTaskExitError( void );
 
 void prvTaskExitError( void )
 {
+volatile uint32_t ulx = 0;
+
 	/* A function that implements a task must not exit or attempt to return to
 	its caller as there is nothing to return to.  If a task wants to exit it
 	should instead call vTaskDelete( NULL ).
 
 	Artificially force an assert() to be triggered if configASSERT() is
 	defined, then stop here so application writers can catch the error. */
-	configASSERT( uxCriticalNesting == ~0UL );
+	configASSERT( ulx == ~0UL );
 	portDISABLE_INTERRUPTS();
 	for( ;; );
 }
diff --git a/FreeRTOS/Source/portable/GCC/RISC-V-RV32/portmacro.h b/FreeRTOS/Source/portable/GCC/RISC-V-RV32/portmacro.h
index de8b860a5..0f95f3ee0 100644
--- a/FreeRTOS/Source/portable/GCC/RISC-V-RV32/portmacro.h
+++ b/FreeRTOS/Source/portable/GCC/RISC-V-RV32/portmacro.h
@@ -81,7 +81,7 @@ not need to be guarded with a critical section. */
 extern int vPortSetInterruptMask( void );
 extern void vPortClearInterruptMask( int );
 
-#define portSET_INTERRUPT_MASK_FROM_ISR()
+#define portSET_INTERRUPT_MASK_FROM_ISR() 0
 #define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusValue )
 #define portDISABLE_INTERRUPTS()
 #define portENABLE_INTERRUPTS()