From: Stefan Agner Date: Fri, 10 Mar 2017 01:17:52 +0000 (-0800) Subject: colibri_imx7: implement board level USB PHY mode X-Git-Tag: v2017.05-rc1~49^2~14 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=5a986dfeef889d281bb807f328418983ea7c0832;p=u-boot colibri_imx7: implement board level USB PHY mode Implement board level USB PHY mode callback. On USB OTG Port 1 the Colibri standard foresees GPIO USBC_DET to decide whether the port should run in Host or Device mode. Signed-off-by: Stefan Agner --- diff --git a/board/toradex/colibri_imx7/colibri_imx7.c b/board/toradex/colibri_imx7/colibri_imx7.c index e1340c323b..c03bde168a 100644 --- a/board/toradex/colibri_imx7/colibri_imx7.c +++ b/board/toradex/colibri_imx7/colibri_imx7.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include "../common/tdx-common.h" @@ -46,6 +47,8 @@ DECLARE_GLOBAL_DATA_PTR; #define NAND_PAD_READY0_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUS_PU5KOHM) +#define USB_CDET_GPIO IMX_GPIO_NR(7, 14) + int dram_init(void) { gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); @@ -71,6 +74,12 @@ static iomux_v3_cfg_t const usdhc1_pads[] = { MX7D_PAD_GPIO1_IO00__GPIO1_IO0 | MUX_PAD_CTRL(NO_PAD_CTRL), }; +#ifdef CONFIG_USB_EHCI_MX7 +static iomux_v3_cfg_t const usb_cdet_pads[] = { + MX7D_PAD_ENET1_CRS__GPIO7_IO14 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; +#endif + #ifdef CONFIG_NAND_MXS static iomux_v3_cfg_t const gpmi_pads[] = { MX7D_PAD_SD3_DATA0__NAND_DATA00 | MUX_PAD_CTRL(NAND_PAD_CTRL), @@ -319,6 +328,11 @@ int board_init(void) setup_lcd(); #endif +#ifdef CONFIG_USB_EHCI_MX7 + imx_iomux_v3_setup_multiple_pads(usb_cdet_pads, ARRAY_SIZE(usb_cdet_pads)); + gpio_request(USB_CDET_GPIO, "usb-cdet-gpio"); +#endif + return 0; } @@ -417,4 +431,18 @@ int board_ehci_hcd_init(int port) } return 0; } + +int board_usb_phy_mode(int port) +{ + switch (port) { + case 0: + if (gpio_get_value(USB_CDET_GPIO)) + return USB_INIT_DEVICE; + else + return USB_INIT_HOST; + case 1: + default: + return USB_INIT_HOST; + } +} #endif