From: richardbarry Date: Wed, 5 Mar 2008 12:24:31 +0000 (+0000) Subject: Rename PPC405 to PPC405_Xilinx. X-Git-Tag: V4.8.0~47 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=5c97c842c15d630d02ad30428b050db994aa5c61;p=freertos Rename PPC405 to PPC405_Xilinx. git-svn-id: https://svn.code.sf.net/p/freertos/code/trunk@234 1d2547de-c912-0410-9cb9-b8ca96c0e9e2 --- diff --git a/Source/portable/GCC/PPC405/port.c b/Source/portable/GCC/PPC405/port.c deleted file mode 100644 index b97444b3c..000000000 --- a/Source/portable/GCC/PPC405/port.c +++ /dev/null @@ -1,308 +0,0 @@ -/* - FreeRTOS.org V4.7.1 - Copyright (C) 2003-2008 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - - Please ensure to read the configuration and relevant port sections of the - online documentation. - - +++ http://www.FreeRTOS.org +++ - Documentation, latest information, license and contact details. - - +++ http://www.SafeRTOS.com +++ - A version that is certified for use in safety critical systems. - - +++ http://www.OpenRTOS.com +++ - Commercial support, development, porting, licensing and training services. - - *************************************************************************** -*/ - -/*----------------------------------------------------------- - * Implementation of functions defined in portable.h for the PPC405 port. - *----------------------------------------------------------*/ - - -/* Scheduler includes. */ -#include "FreeRTOS.h" -#include "task.h" - -/* Library includes. */ -#include "xtime_l.h" -#include "xintc.h" -#include "xintc_i.h" - -/* Standard includes. */ -#include - -/*-----------------------------------------------------------*/ - -#define portCRITICAL_INTERRUPT_ENABLE ( 0UL << 17UL ) -#define portEXTERNAL_INTERRUPT_ENABLE ( 1UL << 15UL ) -#define portMACHINE_CHECK_ENABLE ( 0UL << 12UL ) -#define portINITIAL_MSR ( portCRITICAL_INTERRUPT_ENABLE | portEXTERNAL_INTERRUPT_ENABLE | portMACHINE_CHECK_ENABLE ) - -/* - */ -static void prvSetupTimerInterrupt( void ); -extern void vPortTickISR( void ); -extern void vPortYield( void ); -extern void vPortStartFirstTask( void ); - -static XIntc xInterruptController; - -/* - * Initialise the stack of a task to look exactly as if a call to - * portSAVE_CONTEXT had been made. - * - * See the header file portable.h. - */ -portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters ) -{ - /* Place a known value at the bottom of the stack for debugging. */ - *pxTopOfStack = 0xDEADBEEF; - *pxTopOfStack--; - - /* EABI stack frame. */ - *pxTopOfStack = 0x31313131UL; /* R31. */ - pxTopOfStack--; - *pxTopOfStack = 0x30303030UL; /* R30. */ - pxTopOfStack--; - *pxTopOfStack = 0x29292929UL; /* R29. */ - pxTopOfStack--; - *pxTopOfStack = 0x28282828UL; /* R28. */ - pxTopOfStack--; - *pxTopOfStack = 0x27272727UL; /* R27. */ - pxTopOfStack--; - *pxTopOfStack = 0x26262626UL; /* R26. */ - pxTopOfStack--; - *pxTopOfStack = 0x25252525UL; /* R25. */ - pxTopOfStack--; - *pxTopOfStack = 0x24242424UL; /* R24. */ - pxTopOfStack--; - *pxTopOfStack = 0x23232323UL; /* R23. */ - pxTopOfStack--; - *pxTopOfStack = 0x22222222UL; /* R22. */ - pxTopOfStack--; - *pxTopOfStack = 0x21212121UL; /* R21. */ - pxTopOfStack--; - *pxTopOfStack = 0x20202020UL; /* R20. */ - pxTopOfStack--; - *pxTopOfStack = 0x19191919UL; /* R19. */ - pxTopOfStack--; - *pxTopOfStack = 0x18181818UL; /* R18. */ - pxTopOfStack--; - *pxTopOfStack = 0x17171717UL; /* R17. */ - pxTopOfStack--; - *pxTopOfStack = 0x16161616UL; /* R16. */ - pxTopOfStack--; - *pxTopOfStack = 0x15151515UL; /* R15. */ - pxTopOfStack--; - *pxTopOfStack = 0x14141414UL; /* R14. */ - pxTopOfStack--; - *pxTopOfStack = 0x13131313UL; /* R13. */ - pxTopOfStack--; - *pxTopOfStack = 0x12121212UL; /* R12. */ - pxTopOfStack--; - *pxTopOfStack = 0x11111111UL; /* R11. */ - pxTopOfStack--; - *pxTopOfStack = 0x10101010UL; /* R10. */ - pxTopOfStack--; - *pxTopOfStack = 0x09090909UL; /* R9. */ - pxTopOfStack--; - *pxTopOfStack = 0x08080808UL; /* R8. */ - pxTopOfStack--; - *pxTopOfStack = 0x07070707UL; /* R7. */ - pxTopOfStack--; - *pxTopOfStack = 0x06060606UL; /* R6. */ - pxTopOfStack--; - *pxTopOfStack = 0x05050505UL; /* R5. */ - pxTopOfStack--; - *pxTopOfStack = 0x04040404UL; /* R4. */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; - pxTopOfStack--; - *pxTopOfStack = 0x02020202UL; /* R2. */ - pxTopOfStack--; - *pxTopOfStack = 0x10000001UL;; /* R0. */ - pxTopOfStack--; - *pxTopOfStack = 0x00000000UL; /* USPRG0. */ - pxTopOfStack--; - *pxTopOfStack = 0x00000000UL; /* CR. */ - pxTopOfStack--; - *pxTopOfStack = 0x00000000UL; /* XER. */ - pxTopOfStack--; - *pxTopOfStack = 0x00000000UL; /* CTR. */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) vPortStartFirstTask; /* LR. */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* SRR0. */ - pxTopOfStack--; - *pxTopOfStack = portINITIAL_MSR;/* SRR1. */ - pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) vPortStartFirstTask;/* Next LR. */ - pxTopOfStack--; - *pxTopOfStack = 0x00000000UL;;/* Backchain. */ -// pxTopOfStack--; - - return pxTopOfStack; -} -/*-----------------------------------------------------------*/ - -portBASE_TYPE xPortStartScheduler( void ) -{ -extern void *pxCurrentTCB; - - prvSetupTimerInterrupt(); - - XExc_RegisterHandler( XEXC_ID_SYSTEM_CALL, ( XExceptionHandler ) vPortYield, ( void * ) 0 ); - -// XExc_mEnableExceptions( XEXC_NON_CRITICAL ); - - vPortStartFirstTask(); - - /* Should not get here as the tasks are now running! */ - return pdFALSE; -} -/*-----------------------------------------------------------*/ - -void vPortEndScheduler( void ) -{ - /* Not implemented. */ -} -/*-----------------------------------------------------------*/ - -/* - * Hardware initialisation to generate the RTOS tick. - */ -static void prvTickISR( void ); -static void prvSetupTimerInterrupt( void ) -{ -const unsigned portLONG ulInterval = ( ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL ); - - XTime_PITClearInterrupt(); - XTime_FITClearInterrupt(); - XTime_WDTClearInterrupt(); - XTime_WDTDisableInterrupt(); - XTime_FITDisableInterrupt(); - - XExc_RegisterHandler( XEXC_ID_PIT_INT, ( XExceptionHandler ) vPortTickISR, ( void * ) 0 ); - - XTime_PITEnableAutoReload(); - XTime_PITSetInterval( ulInterval ); - XTime_PITEnableInterrupt(); -} -/*-----------------------------------------------------------*/ - -static void prvTickISR( void ) -{ -static unsigned portLONG ulTicks = 0; - - ulTicks++; - if( ulTicks >= 1000 ) - { - vParTestToggleLED( 0 ); - ulTicks = 0; - } - XTime_PITClearInterrupt(); -} -/*-----------------------------------------------------------*/ - -void vPortISRHandler( void *vNullDoNotUse ) -{ -Xuint32 IntrStatus; -Xuint32 IntrMask = 1; -int IntrNumber; -//extern XIntc xInterruptController; -XIntc_Config *CfgPtr;// = xInterruptController.CfgPtr; - - /* Get the configuration data using the device ID */ - //CfgPtr = &XIntc_ConfigTable[(Xuint32)DeviceId]; - CfgPtr = &XIntc_ConfigTable[(Xuint32)XPAR_OPB_INTC_0_DEVICE_ID]; - - /* Get the interrupts that are waiting to be serviced */ - IntrStatus = XIntc_mGetIntrStatus(CfgPtr->BaseAddress); - - /* Service each interrupt that is active and enabled by checking each - * bit in the register from LSB to MSB which corresponds to an interrupt - * intput signal - */ - for (IntrNumber = 0; IntrNumber < XPAR_INTC_MAX_NUM_INTR_INPUTS; - IntrNumber++) - { - if (IntrStatus & 1) - { - XIntc_VectorTableEntry *TablePtr; - - /* The interrupt is active and enabled, call the interrupt - * handler that was setup with the specified parameter - */ - TablePtr = &(CfgPtr->HandlerTable[IntrNumber]); - TablePtr->Handler(TablePtr->CallBackRef); - - /* Clear the interrupt. */ - XIntc_mAckIntr(CfgPtr->BaseAddress, IntrMask); - break; - } - - /* Move to the next interrupt to check */ - IntrMask <<= 1; - IntrStatus >>= 1; - - /* If there are no other bits set indicating that all interrupts - * have been serviced, then exit the loop - */ - if (IntrStatus == 0) - { - break; - } - } -} -/*-----------------------------------------------------------*/ - -void vPortSetupInterruptController( void ) -{ -extern void vPortISRWrapper( void ); - - XExc_mDisableExceptions( XEXC_NON_CRITICAL ); - XExc_Init(); - XExc_RegisterHandler( XEXC_ID_NON_CRITICAL_INT, (XExceptionHandler)vPortISRWrapper, NULL ); - XIntc_Initialize( &xInterruptController, XPAR_OPB_INTC_0_DEVICE_ID ); - XIntc_Start( &xInterruptController, XIN_REAL_MODE ); -} -/*-----------------------------------------------------------*/ - -portBASE_TYPE xPortInstallInterruptHandler( unsigned portCHAR ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef ) -{ -portBASE_TYPE xReturn = pdFAIL; - - if( XST_SUCCESS == XIntc_Connect( &xInterruptController, ucInterruptID, pxHandler, pvCallBackRef ) ) - { - XIntc_Enable( &xInterruptController, ucInterruptID ); - xReturn = pdPASS; - } - - return xReturn; -} diff --git a/Source/portable/GCC/PPC405/portasm.s b/Source/portable/GCC/PPC405/portasm.s deleted file mode 100644 index 64b511ed8..000000000 --- a/Source/portable/GCC/PPC405/portasm.s +++ /dev/null @@ -1,241 +0,0 @@ -#include "xreg405.h" - - .extern pxCurrentTCB - .extern vTaskSwitchContext - .extern vTaskIncrementTick - .extern vPortISRHandler - - .global vPortStartFirstTask - .global vPortYield - .global vPortTickISR - .global vPortISRWrapper - -.set portCONTEXT_SIZE, 156 -.set portR0_OFFSET, 152 -.set portGPR_OFFSET, 32 -.set portCR_OFFSET, 28 -.set portXER_OFFSET, 24 -.set portLR_OFFSET, 16 -.set portCTR_OFFSET, 16 -.set portUSPRG0_OFFSET, 12 -.set portSRR0_OFFSET, 8 -.set portSRR1_OFFSET, 4 - - -.set BChainField, 0 -.set NextLRField, BChainField + 4 -.set MSRField, NextLRField + 4 -.set PCField, MSRField + 4 -.set LRField, PCField + 4 -.set CTRField, LRField + 4 -.set XERField, CTRField + 4 -.set CRField, XERField + 4 -.set USPRG0Field, CRField + 4 -.set r0Field, USPRG0Field + 4 -.set r2Field, r0Field + 4 -.set r3r31Field, r2Field + 4 -.set IFrameSize, r3r31Field + ( ( 31 - 3 ) + 1 ) * 4 - - -.macro portRESTORE_CONTEXT - - # Get the address of the TCB. - xor R0, R0, R0 - addis SP, R0, pxCurrentTCB@ha - lwz SP, pxCurrentTCB@l( SP ) - - # Get the task stack pointer from the TCB. - lwz SP, 0( SP ) - - # Pop the special purpose registers - lwz R0, portSRR1_OFFSET( SP ) - mtspr SRR1, R0 - lwz R0, portSRR0_OFFSET( SP ) - mtspr SRR0, R0 - lwz R0, portUSPRG0_OFFSET( SP ) - mtspr 256, R0 #USPRG0 - lwz R0, portCTR_OFFSET( SP ) - mtspr CTR, R0 - lwz R0, portLR_OFFSET( SP ) - mtspr LR, R0 - lwz R0, portXER_OFFSET( SP ) - mtspr XER, R0 - lwz R0, portCR_OFFSET( SP ) - mtcr R0 - - # Pop GPRs - lmw R2, portGPR_OFFSET( SP ) - - # Finally pop R0 and correct the stack pointer - lwz R0, portR0_OFFSET( SP ) - addi R1, R1, portCONTEXT_SIZE - - # Start the task running - rfi - - .endm - -.macro portSAVE_CONTEXT - - # Make room on the stack. - subi R1, R1, portCONTEXT_SIZE - - # Push R0, then the GPRs - stw R0, portR0_OFFSET( SP ) - stm R2, portGPR_OFFSET( SP ) - - # Push the SFRs - mfcr R0 - stw R0, portCR_OFFSET( SP ) - mfspr R0, XER - stw R0, portXER_OFFSET( SP ) - mfspr R0, LR - stw R0, portLR_OFFSET( SP ) - mfspr R0, CTR - stw R0, portCTR_OFFSET( SP ) - mfspr R0, 256 #USPRG0 - stw R0, portUSPRG0_OFFSET( SP ) - mfspr R0, SRR0 - stw R0, portSRR0_OFFSET( SP ) - mfspr R0, SRR1 - stw R0, portSRR1_OFFSET( SP ) - - # Get the address of the TCB. - xor R0, R0, R0 - addis R2, R0, pxCurrentTCB@ha - lwz R2, pxCurrentTCB@l( R2 ) - - # Store the stack pointer into the TCB - stw SP, 0( R2 ) - - .endm - - -.macro int_epilogue - - # Get the address of the TCB. - xor R0, R0, R0 - addis SP, R0, pxCurrentTCB@ha - lwz SP, pxCurrentTCB@l( SP ) - - # Get the task stack pointer from the TCB. - lwz SP, 0( SP ) - - # Restore MSR register to SRR1. - lwz R0,MSRField(R1) - mtsrr1 R0 - - # Restore current PC location to SRR0. - lwz R0,PCField(R1) - mtsrr0 R0 - - # Save USPRG0 register - lwz R0,USPRG0Field(R1) - mtspr 0x100,R0 - - # Restore Condition register - lwz R0,CRField(R1) - mtcr R0 - - # Restore Fixed Point Exception register - lwz R0,XERField(R1) - mtxer R0 - - # Restore Counter register - lwz R0,CTRField(R1) - mtctr R0 - - # Restore Link register - lwz R0,LRField(R1) - mtlr R0 - - # Restore remaining GPR registers. - lmw R3,r3r31Field(R1) - - # Restore r0 and r2. - lwz R0,r0Field(R1) - lwz R2,r2Field(R1) - - # Remove frame from stack - addi R1,R1,IFrameSize - -.endm - -.macro portENTER_SWITCHING_ISR - - # Get the address of the TCB. - xor R0, R0, R0 - addis R2, R0, pxCurrentTCB@ha - lwz R2, pxCurrentTCB@l( R2 ) - - # Store the stack pointer into the TCB - stw SP, 0( R2 ) - - # Save the link register - stwu R1, -24( R1 ) - mflr R0 - stw R31, 20( R1 ) - stw R0, 28( R1 ) - mr R31, r1 - -.endm - -.macro portEXIT_SWITCHING_ISR - - # Restore the link register - lwz R11, 0( R1 ) - lwz R0, 4( R11 ) - mtlr R0 - lwz R31, -4( R11 ) - mr R1, R11 - - # Get the address of the TCB. - xor R0, R0, R0 - addis SP, R0, pxCurrentTCB@ha - lwz SP, pxCurrentTCB@l( R1 ) - - # Get the task stack pointer from the TCB. - lwz SP, 0( SP ) - -.endm - - -vPortStartFirstTask: - - int_epilogue - rfi - -#vPortStartFirstTask: -# portRESTORE_CONTEXT -# rfi - - - -vPortYield: - - portENTER_SWITCHING_ISR - bl vTaskSwitchContext - portEXIT_SWITCHING_ISR - blr - -vPortTickISR: - - portENTER_SWITCHING_ISR - bl vTaskIncrementTick - #if configUSE_PREEMPTION == 1 - bl vTaskSwitchContext - #endif - - # Clear the interrupt - lis R0, 2048 - mttsr R0 - - portEXIT_SWITCHING_ISR - blr - -vPortISRWrapper: - - portENTER_SWITCHING_ISR - bl vPortISRHandler - portEXIT_SWITCHING_ISR - blr diff --git a/Source/portable/GCC/PPC405/portmacro.h b/Source/portable/GCC/PPC405/portmacro.h deleted file mode 100644 index 6ba2c7f08..000000000 --- a/Source/portable/GCC/PPC405/portmacro.h +++ /dev/null @@ -1,122 +0,0 @@ -/* - FreeRTOS.org V4.7.1 - Copyright (C) 2003-2008 Richard Barry. - - This file is part of the FreeRTOS.org distribution. - - FreeRTOS.org is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - FreeRTOS.org is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with FreeRTOS.org; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes FreeRTOS.org, without being obliged to provide - the source code for any proprietary components. See the licensing section - of http://www.FreeRTOS.org for full details of how and when the exception - can be applied. - - *************************************************************************** - - Please ensure to read the configuration and relevant port sections of the - online documentation. - - +++ http://www.FreeRTOS.org +++ - Documentation, latest information, license and contact details. - - +++ http://www.SafeRTOS.com +++ - A version that is certified for use in safety critical systems. - - +++ http://www.OpenRTOS.com +++ - Commercial support, development, porting, licensing and training services. - - *************************************************************************** -*/ - -#ifndef PORTMACRO_H -#define PORTMACRO_H - -#include "xexception_l.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/*----------------------------------------------------------- - * Port specific definitions. - * - * The settings in this file configure FreeRTOS correctly for the - * given hardware and compiler. - * - * These settings should not be altered. - *----------------------------------------------------------- - */ - -/* Type definitions. */ -#define portCHAR char -#define portFLOAT float -#define portDOUBLE double -#define portLONG long -#define portSHORT short -#define portSTACK_TYPE unsigned portLONG -#define portBASE_TYPE portLONG - -#if( configUSE_16_BIT_TICKS == 1 ) - typedef unsigned portSHORT portTickType; - #define portMAX_DELAY ( portTickType ) 0xffff -#else - typedef unsigned portLONG portTickType; - #define portMAX_DELAY ( portTickType ) 0xffffffff -#endif -/*-----------------------------------------------------------*/ - -#define portCRITICAL_NESTING_IN_TCB 1 - -/* Interrupt control macros. */ -#define portDISABLE_INTERRUPTS() XExc_mDisableExceptions( XEXC_NON_CRITICAL ); -#define portENABLE_INTERRUPTS() XExc_mEnableExceptions( XEXC_NON_CRITICAL ); - -/*-----------------------------------------------------------*/ - -/* Critical section macros. */ -void vTaskEnterCritical( void ); -void vTaskExitCritical( void ); -#define portENTER_CRITICAL() vTaskEnterCritical() -#define portEXIT_CRITICAL() vTaskExitCritical() - -/*-----------------------------------------------------------*/ - -/* Task utilities. */ -void vPortYield( void ); -#define portYIELD() asm volatile ( "SC \n\t NOP" ) -#define portYIELD_FROM_ISR() vTaskSwitchContext() -/*-----------------------------------------------------------*/ - -/* Hardware specifics. */ -#define portBYTE_ALIGNMENT 8 -#define portSTACK_GROWTH ( -1 ) -#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) -#define portNOP() asm volatile ( "NOP" ) -/*-----------------------------------------------------------*/ - -/* Task function macros as described on the FreeRTOS.org WEB site. */ -#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) -#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) - -/* Port specific initialisation function. */ -void vPortSetupInterruptController( void ); -portBASE_TYPE xPortInstallInterruptHandler( unsigned portCHAR ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef ); - -#ifdef __cplusplus -} -#endif - -#endif /* PORTMACRO_H */ - diff --git a/Source/portable/GCC/PPC405_Xilinx/port.c b/Source/portable/GCC/PPC405_Xilinx/port.c new file mode 100644 index 000000000..b97444b3c --- /dev/null +++ b/Source/portable/GCC/PPC405_Xilinx/port.c @@ -0,0 +1,308 @@ +/* + FreeRTOS.org V4.7.1 - Copyright (C) 2003-2008 Richard Barry. + + This file is part of the FreeRTOS.org distribution. + + FreeRTOS.org is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + FreeRTOS.org is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with FreeRTOS.org; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + A special exception to the GPL can be applied should you wish to distribute + a combined work that includes FreeRTOS.org, without being obliged to provide + the source code for any proprietary components. See the licensing section + of http://www.FreeRTOS.org for full details of how and when the exception + can be applied. + + *************************************************************************** + + Please ensure to read the configuration and relevant port sections of the + online documentation. + + +++ http://www.FreeRTOS.org +++ + Documentation, latest information, license and contact details. + + +++ http://www.SafeRTOS.com +++ + A version that is certified for use in safety critical systems. + + +++ http://www.OpenRTOS.com +++ + Commercial support, development, porting, licensing and training services. + + *************************************************************************** +*/ + +/*----------------------------------------------------------- + * Implementation of functions defined in portable.h for the PPC405 port. + *----------------------------------------------------------*/ + + +/* Scheduler includes. */ +#include "FreeRTOS.h" +#include "task.h" + +/* Library includes. */ +#include "xtime_l.h" +#include "xintc.h" +#include "xintc_i.h" + +/* Standard includes. */ +#include + +/*-----------------------------------------------------------*/ + +#define portCRITICAL_INTERRUPT_ENABLE ( 0UL << 17UL ) +#define portEXTERNAL_INTERRUPT_ENABLE ( 1UL << 15UL ) +#define portMACHINE_CHECK_ENABLE ( 0UL << 12UL ) +#define portINITIAL_MSR ( portCRITICAL_INTERRUPT_ENABLE | portEXTERNAL_INTERRUPT_ENABLE | portMACHINE_CHECK_ENABLE ) + +/* + */ +static void prvSetupTimerInterrupt( void ); +extern void vPortTickISR( void ); +extern void vPortYield( void ); +extern void vPortStartFirstTask( void ); + +static XIntc xInterruptController; + +/* + * Initialise the stack of a task to look exactly as if a call to + * portSAVE_CONTEXT had been made. + * + * See the header file portable.h. + */ +portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters ) +{ + /* Place a known value at the bottom of the stack for debugging. */ + *pxTopOfStack = 0xDEADBEEF; + *pxTopOfStack--; + + /* EABI stack frame. */ + *pxTopOfStack = 0x31313131UL; /* R31. */ + pxTopOfStack--; + *pxTopOfStack = 0x30303030UL; /* R30. */ + pxTopOfStack--; + *pxTopOfStack = 0x29292929UL; /* R29. */ + pxTopOfStack--; + *pxTopOfStack = 0x28282828UL; /* R28. */ + pxTopOfStack--; + *pxTopOfStack = 0x27272727UL; /* R27. */ + pxTopOfStack--; + *pxTopOfStack = 0x26262626UL; /* R26. */ + pxTopOfStack--; + *pxTopOfStack = 0x25252525UL; /* R25. */ + pxTopOfStack--; + *pxTopOfStack = 0x24242424UL; /* R24. */ + pxTopOfStack--; + *pxTopOfStack = 0x23232323UL; /* R23. */ + pxTopOfStack--; + *pxTopOfStack = 0x22222222UL; /* R22. */ + pxTopOfStack--; + *pxTopOfStack = 0x21212121UL; /* R21. */ + pxTopOfStack--; + *pxTopOfStack = 0x20202020UL; /* R20. */ + pxTopOfStack--; + *pxTopOfStack = 0x19191919UL; /* R19. */ + pxTopOfStack--; + *pxTopOfStack = 0x18181818UL; /* R18. */ + pxTopOfStack--; + *pxTopOfStack = 0x17171717UL; /* R17. */ + pxTopOfStack--; + *pxTopOfStack = 0x16161616UL; /* R16. */ + pxTopOfStack--; + *pxTopOfStack = 0x15151515UL; /* R15. */ + pxTopOfStack--; + *pxTopOfStack = 0x14141414UL; /* R14. */ + pxTopOfStack--; + *pxTopOfStack = 0x13131313UL; /* R13. */ + pxTopOfStack--; + *pxTopOfStack = 0x12121212UL; /* R12. */ + pxTopOfStack--; + *pxTopOfStack = 0x11111111UL; /* R11. */ + pxTopOfStack--; + *pxTopOfStack = 0x10101010UL; /* R10. */ + pxTopOfStack--; + *pxTopOfStack = 0x09090909UL; /* R9. */ + pxTopOfStack--; + *pxTopOfStack = 0x08080808UL; /* R8. */ + pxTopOfStack--; + *pxTopOfStack = 0x07070707UL; /* R7. */ + pxTopOfStack--; + *pxTopOfStack = 0x06060606UL; /* R6. */ + pxTopOfStack--; + *pxTopOfStack = 0x05050505UL; /* R5. */ + pxTopOfStack--; + *pxTopOfStack = 0x04040404UL; /* R4. */ + pxTopOfStack--; + *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; + pxTopOfStack--; + *pxTopOfStack = 0x02020202UL; /* R2. */ + pxTopOfStack--; + *pxTopOfStack = 0x10000001UL;; /* R0. */ + pxTopOfStack--; + *pxTopOfStack = 0x00000000UL; /* USPRG0. */ + pxTopOfStack--; + *pxTopOfStack = 0x00000000UL; /* CR. */ + pxTopOfStack--; + *pxTopOfStack = 0x00000000UL; /* XER. */ + pxTopOfStack--; + *pxTopOfStack = 0x00000000UL; /* CTR. */ + pxTopOfStack--; + *pxTopOfStack = ( portSTACK_TYPE ) vPortStartFirstTask; /* LR. */ + pxTopOfStack--; + *pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* SRR0. */ + pxTopOfStack--; + *pxTopOfStack = portINITIAL_MSR;/* SRR1. */ + pxTopOfStack--; + *pxTopOfStack = ( portSTACK_TYPE ) vPortStartFirstTask;/* Next LR. */ + pxTopOfStack--; + *pxTopOfStack = 0x00000000UL;;/* Backchain. */ +// pxTopOfStack--; + + return pxTopOfStack; +} +/*-----------------------------------------------------------*/ + +portBASE_TYPE xPortStartScheduler( void ) +{ +extern void *pxCurrentTCB; + + prvSetupTimerInterrupt(); + + XExc_RegisterHandler( XEXC_ID_SYSTEM_CALL, ( XExceptionHandler ) vPortYield, ( void * ) 0 ); + +// XExc_mEnableExceptions( XEXC_NON_CRITICAL ); + + vPortStartFirstTask(); + + /* Should not get here as the tasks are now running! */ + return pdFALSE; +} +/*-----------------------------------------------------------*/ + +void vPortEndScheduler( void ) +{ + /* Not implemented. */ +} +/*-----------------------------------------------------------*/ + +/* + * Hardware initialisation to generate the RTOS tick. + */ +static void prvTickISR( void ); +static void prvSetupTimerInterrupt( void ) +{ +const unsigned portLONG ulInterval = ( ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL ); + + XTime_PITClearInterrupt(); + XTime_FITClearInterrupt(); + XTime_WDTClearInterrupt(); + XTime_WDTDisableInterrupt(); + XTime_FITDisableInterrupt(); + + XExc_RegisterHandler( XEXC_ID_PIT_INT, ( XExceptionHandler ) vPortTickISR, ( void * ) 0 ); + + XTime_PITEnableAutoReload(); + XTime_PITSetInterval( ulInterval ); + XTime_PITEnableInterrupt(); +} +/*-----------------------------------------------------------*/ + +static void prvTickISR( void ) +{ +static unsigned portLONG ulTicks = 0; + + ulTicks++; + if( ulTicks >= 1000 ) + { + vParTestToggleLED( 0 ); + ulTicks = 0; + } + XTime_PITClearInterrupt(); +} +/*-----------------------------------------------------------*/ + +void vPortISRHandler( void *vNullDoNotUse ) +{ +Xuint32 IntrStatus; +Xuint32 IntrMask = 1; +int IntrNumber; +//extern XIntc xInterruptController; +XIntc_Config *CfgPtr;// = xInterruptController.CfgPtr; + + /* Get the configuration data using the device ID */ + //CfgPtr = &XIntc_ConfigTable[(Xuint32)DeviceId]; + CfgPtr = &XIntc_ConfigTable[(Xuint32)XPAR_OPB_INTC_0_DEVICE_ID]; + + /* Get the interrupts that are waiting to be serviced */ + IntrStatus = XIntc_mGetIntrStatus(CfgPtr->BaseAddress); + + /* Service each interrupt that is active and enabled by checking each + * bit in the register from LSB to MSB which corresponds to an interrupt + * intput signal + */ + for (IntrNumber = 0; IntrNumber < XPAR_INTC_MAX_NUM_INTR_INPUTS; + IntrNumber++) + { + if (IntrStatus & 1) + { + XIntc_VectorTableEntry *TablePtr; + + /* The interrupt is active and enabled, call the interrupt + * handler that was setup with the specified parameter + */ + TablePtr = &(CfgPtr->HandlerTable[IntrNumber]); + TablePtr->Handler(TablePtr->CallBackRef); + + /* Clear the interrupt. */ + XIntc_mAckIntr(CfgPtr->BaseAddress, IntrMask); + break; + } + + /* Move to the next interrupt to check */ + IntrMask <<= 1; + IntrStatus >>= 1; + + /* If there are no other bits set indicating that all interrupts + * have been serviced, then exit the loop + */ + if (IntrStatus == 0) + { + break; + } + } +} +/*-----------------------------------------------------------*/ + +void vPortSetupInterruptController( void ) +{ +extern void vPortISRWrapper( void ); + + XExc_mDisableExceptions( XEXC_NON_CRITICAL ); + XExc_Init(); + XExc_RegisterHandler( XEXC_ID_NON_CRITICAL_INT, (XExceptionHandler)vPortISRWrapper, NULL ); + XIntc_Initialize( &xInterruptController, XPAR_OPB_INTC_0_DEVICE_ID ); + XIntc_Start( &xInterruptController, XIN_REAL_MODE ); +} +/*-----------------------------------------------------------*/ + +portBASE_TYPE xPortInstallInterruptHandler( unsigned portCHAR ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef ) +{ +portBASE_TYPE xReturn = pdFAIL; + + if( XST_SUCCESS == XIntc_Connect( &xInterruptController, ucInterruptID, pxHandler, pvCallBackRef ) ) + { + XIntc_Enable( &xInterruptController, ucInterruptID ); + xReturn = pdPASS; + } + + return xReturn; +} diff --git a/Source/portable/GCC/PPC405_Xilinx/portasm.s b/Source/portable/GCC/PPC405_Xilinx/portasm.s new file mode 100644 index 000000000..64b511ed8 --- /dev/null +++ b/Source/portable/GCC/PPC405_Xilinx/portasm.s @@ -0,0 +1,241 @@ +#include "xreg405.h" + + .extern pxCurrentTCB + .extern vTaskSwitchContext + .extern vTaskIncrementTick + .extern vPortISRHandler + + .global vPortStartFirstTask + .global vPortYield + .global vPortTickISR + .global vPortISRWrapper + +.set portCONTEXT_SIZE, 156 +.set portR0_OFFSET, 152 +.set portGPR_OFFSET, 32 +.set portCR_OFFSET, 28 +.set portXER_OFFSET, 24 +.set portLR_OFFSET, 16 +.set portCTR_OFFSET, 16 +.set portUSPRG0_OFFSET, 12 +.set portSRR0_OFFSET, 8 +.set portSRR1_OFFSET, 4 + + +.set BChainField, 0 +.set NextLRField, BChainField + 4 +.set MSRField, NextLRField + 4 +.set PCField, MSRField + 4 +.set LRField, PCField + 4 +.set CTRField, LRField + 4 +.set XERField, CTRField + 4 +.set CRField, XERField + 4 +.set USPRG0Field, CRField + 4 +.set r0Field, USPRG0Field + 4 +.set r2Field, r0Field + 4 +.set r3r31Field, r2Field + 4 +.set IFrameSize, r3r31Field + ( ( 31 - 3 ) + 1 ) * 4 + + +.macro portRESTORE_CONTEXT + + # Get the address of the TCB. + xor R0, R0, R0 + addis SP, R0, pxCurrentTCB@ha + lwz SP, pxCurrentTCB@l( SP ) + + # Get the task stack pointer from the TCB. + lwz SP, 0( SP ) + + # Pop the special purpose registers + lwz R0, portSRR1_OFFSET( SP ) + mtspr SRR1, R0 + lwz R0, portSRR0_OFFSET( SP ) + mtspr SRR0, R0 + lwz R0, portUSPRG0_OFFSET( SP ) + mtspr 256, R0 #USPRG0 + lwz R0, portCTR_OFFSET( SP ) + mtspr CTR, R0 + lwz R0, portLR_OFFSET( SP ) + mtspr LR, R0 + lwz R0, portXER_OFFSET( SP ) + mtspr XER, R0 + lwz R0, portCR_OFFSET( SP ) + mtcr R0 + + # Pop GPRs + lmw R2, portGPR_OFFSET( SP ) + + # Finally pop R0 and correct the stack pointer + lwz R0, portR0_OFFSET( SP ) + addi R1, R1, portCONTEXT_SIZE + + # Start the task running + rfi + + .endm + +.macro portSAVE_CONTEXT + + # Make room on the stack. + subi R1, R1, portCONTEXT_SIZE + + # Push R0, then the GPRs + stw R0, portR0_OFFSET( SP ) + stm R2, portGPR_OFFSET( SP ) + + # Push the SFRs + mfcr R0 + stw R0, portCR_OFFSET( SP ) + mfspr R0, XER + stw R0, portXER_OFFSET( SP ) + mfspr R0, LR + stw R0, portLR_OFFSET( SP ) + mfspr R0, CTR + stw R0, portCTR_OFFSET( SP ) + mfspr R0, 256 #USPRG0 + stw R0, portUSPRG0_OFFSET( SP ) + mfspr R0, SRR0 + stw R0, portSRR0_OFFSET( SP ) + mfspr R0, SRR1 + stw R0, portSRR1_OFFSET( SP ) + + # Get the address of the TCB. + xor R0, R0, R0 + addis R2, R0, pxCurrentTCB@ha + lwz R2, pxCurrentTCB@l( R2 ) + + # Store the stack pointer into the TCB + stw SP, 0( R2 ) + + .endm + + +.macro int_epilogue + + # Get the address of the TCB. + xor R0, R0, R0 + addis SP, R0, pxCurrentTCB@ha + lwz SP, pxCurrentTCB@l( SP ) + + # Get the task stack pointer from the TCB. + lwz SP, 0( SP ) + + # Restore MSR register to SRR1. + lwz R0,MSRField(R1) + mtsrr1 R0 + + # Restore current PC location to SRR0. + lwz R0,PCField(R1) + mtsrr0 R0 + + # Save USPRG0 register + lwz R0,USPRG0Field(R1) + mtspr 0x100,R0 + + # Restore Condition register + lwz R0,CRField(R1) + mtcr R0 + + # Restore Fixed Point Exception register + lwz R0,XERField(R1) + mtxer R0 + + # Restore Counter register + lwz R0,CTRField(R1) + mtctr R0 + + # Restore Link register + lwz R0,LRField(R1) + mtlr R0 + + # Restore remaining GPR registers. + lmw R3,r3r31Field(R1) + + # Restore r0 and r2. + lwz R0,r0Field(R1) + lwz R2,r2Field(R1) + + # Remove frame from stack + addi R1,R1,IFrameSize + +.endm + +.macro portENTER_SWITCHING_ISR + + # Get the address of the TCB. + xor R0, R0, R0 + addis R2, R0, pxCurrentTCB@ha + lwz R2, pxCurrentTCB@l( R2 ) + + # Store the stack pointer into the TCB + stw SP, 0( R2 ) + + # Save the link register + stwu R1, -24( R1 ) + mflr R0 + stw R31, 20( R1 ) + stw R0, 28( R1 ) + mr R31, r1 + +.endm + +.macro portEXIT_SWITCHING_ISR + + # Restore the link register + lwz R11, 0( R1 ) + lwz R0, 4( R11 ) + mtlr R0 + lwz R31, -4( R11 ) + mr R1, R11 + + # Get the address of the TCB. + xor R0, R0, R0 + addis SP, R0, pxCurrentTCB@ha + lwz SP, pxCurrentTCB@l( R1 ) + + # Get the task stack pointer from the TCB. + lwz SP, 0( SP ) + +.endm + + +vPortStartFirstTask: + + int_epilogue + rfi + +#vPortStartFirstTask: +# portRESTORE_CONTEXT +# rfi + + + +vPortYield: + + portENTER_SWITCHING_ISR + bl vTaskSwitchContext + portEXIT_SWITCHING_ISR + blr + +vPortTickISR: + + portENTER_SWITCHING_ISR + bl vTaskIncrementTick + #if configUSE_PREEMPTION == 1 + bl vTaskSwitchContext + #endif + + # Clear the interrupt + lis R0, 2048 + mttsr R0 + + portEXIT_SWITCHING_ISR + blr + +vPortISRWrapper: + + portENTER_SWITCHING_ISR + bl vPortISRHandler + portEXIT_SWITCHING_ISR + blr diff --git a/Source/portable/GCC/PPC405_Xilinx/portmacro.h b/Source/portable/GCC/PPC405_Xilinx/portmacro.h new file mode 100644 index 000000000..6ba2c7f08 --- /dev/null +++ b/Source/portable/GCC/PPC405_Xilinx/portmacro.h @@ -0,0 +1,122 @@ +/* + FreeRTOS.org V4.7.1 - Copyright (C) 2003-2008 Richard Barry. + + This file is part of the FreeRTOS.org distribution. + + FreeRTOS.org is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + FreeRTOS.org is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with FreeRTOS.org; if not, write to the Free Software + Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + + A special exception to the GPL can be applied should you wish to distribute + a combined work that includes FreeRTOS.org, without being obliged to provide + the source code for any proprietary components. See the licensing section + of http://www.FreeRTOS.org for full details of how and when the exception + can be applied. + + *************************************************************************** + + Please ensure to read the configuration and relevant port sections of the + online documentation. + + +++ http://www.FreeRTOS.org +++ + Documentation, latest information, license and contact details. + + +++ http://www.SafeRTOS.com +++ + A version that is certified for use in safety critical systems. + + +++ http://www.OpenRTOS.com +++ + Commercial support, development, porting, licensing and training services. + + *************************************************************************** +*/ + +#ifndef PORTMACRO_H +#define PORTMACRO_H + +#include "xexception_l.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/*----------------------------------------------------------- + * Port specific definitions. + * + * The settings in this file configure FreeRTOS correctly for the + * given hardware and compiler. + * + * These settings should not be altered. + *----------------------------------------------------------- + */ + +/* Type definitions. */ +#define portCHAR char +#define portFLOAT float +#define portDOUBLE double +#define portLONG long +#define portSHORT short +#define portSTACK_TYPE unsigned portLONG +#define portBASE_TYPE portLONG + +#if( configUSE_16_BIT_TICKS == 1 ) + typedef unsigned portSHORT portTickType; + #define portMAX_DELAY ( portTickType ) 0xffff +#else + typedef unsigned portLONG portTickType; + #define portMAX_DELAY ( portTickType ) 0xffffffff +#endif +/*-----------------------------------------------------------*/ + +#define portCRITICAL_NESTING_IN_TCB 1 + +/* Interrupt control macros. */ +#define portDISABLE_INTERRUPTS() XExc_mDisableExceptions( XEXC_NON_CRITICAL ); +#define portENABLE_INTERRUPTS() XExc_mEnableExceptions( XEXC_NON_CRITICAL ); + +/*-----------------------------------------------------------*/ + +/* Critical section macros. */ +void vTaskEnterCritical( void ); +void vTaskExitCritical( void ); +#define portENTER_CRITICAL() vTaskEnterCritical() +#define portEXIT_CRITICAL() vTaskExitCritical() + +/*-----------------------------------------------------------*/ + +/* Task utilities. */ +void vPortYield( void ); +#define portYIELD() asm volatile ( "SC \n\t NOP" ) +#define portYIELD_FROM_ISR() vTaskSwitchContext() +/*-----------------------------------------------------------*/ + +/* Hardware specifics. */ +#define portBYTE_ALIGNMENT 8 +#define portSTACK_GROWTH ( -1 ) +#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) +#define portNOP() asm volatile ( "NOP" ) +/*-----------------------------------------------------------*/ + +/* Task function macros as described on the FreeRTOS.org WEB site. */ +#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) +#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) + +/* Port specific initialisation function. */ +void vPortSetupInterruptController( void ); +portBASE_TYPE xPortInstallInterruptHandler( unsigned portCHAR ucInterruptID, XInterruptHandler pxHandler, void *pvCallBackRef ); + +#ifdef __cplusplus +} +#endif + +#endif /* PORTMACRO_H */ +