From: Stefan Roese <sr@denx.de>
Date: Wed, 31 Oct 2007 19:58:34 +0000 (+0100)
Subject: ppc4xx: Fix acadia_nand build problem
X-Git-Tag: v1.3.2-rc1~102^2~85
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=5d96d40d3f36da33348e68f9ea993f383e11f997;p=u-boot

ppc4xx: Fix acadia_nand build problem

Since the cache handling functions were moved from start.S into cache.S
the acadia NAND booting Makfile needs to be adapted accordingly.

Signed-off-by: Stefan Roese <sr@denx.de>
---

diff --git a/nand_spl/board/amcc/acadia/Makefile b/nand_spl/board/amcc/acadia/Makefile
index 926476f91b..2a860140d2 100644
--- a/nand_spl/board/amcc/acadia/Makefile
+++ b/nand_spl/board/amcc/acadia/Makefile
@@ -29,7 +29,7 @@ LDFLAGS	= -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
 AFLAGS	+= -DCONFIG_NAND_SPL
 CFLAGS	+= -DCONFIG_NAND_SPL
 
-SOBJS	= start.o resetvec.o
+SOBJS	= start.o resetvec.o cache.o
 COBJS	= gpio.o nand_boot.o nand_ecc.o memory.o ndfc.o pll.o
 
 SRCS	:= $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
@@ -63,6 +63,10 @@ $(nandobj)System.map:	$(nandobj)u-boot-spl
 # create symbolic links for common files
 
 # from cpu directory
+$(obj)cache.S:
+	@rm -f $(obj)cache.S
+	ln -s $(SRCTREE)/cpu/ppc4xx/cache.S $(obj)cache.S
+
 $(obj)gpio.c:
 	@rm -f $(obj)gpio.c
 	ln -s $(SRCTREE)/cpu/ppc4xx/gpio.c $(obj)gpio.c