From: Arnab Basu <arnab.basu@freescale.com>
Date: Tue, 6 Jan 2015 21:18:41 +0000 (-0800)
Subject: ARMv8/fsl-lsch3: Patch cpu node properties in DT for online cores
X-Git-Tag: v2015.04-rc3~15^2~30
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=60385d94e56513b50b87724fb9a3878ee5086da9;p=u-boot

ARMv8/fsl-lsch3: Patch cpu node properties in DT for online cores

U-Boot should only add "enable-method" and "cpu-release-address"
properties to the "cpu" node of the online cores.

Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
---

diff --git a/arch/arm/cpu/armv8/fsl-lsch3/fdt.c b/arch/arm/cpu/armv8/fsl-lsch3/fdt.c
index e392eb9149..2287e268a2 100644
--- a/arch/arm/cpu/armv8/fsl-lsch3/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-lsch3/fdt.c
@@ -16,7 +16,7 @@ void ft_fixup_cpu(void *blob)
 	__maybe_unused u64 spin_tbl_addr = (u64)get_spin_tbl_addr();
 	fdt32_t *reg;
 	int addr_cells;
-	u64 val;
+	u64 val, core_id;
 	size_t *boot_code_size = &(__secondary_boot_code_size);
 
 	off = fdt_path_offset(blob, "/cpus");
@@ -29,15 +29,20 @@ void ft_fixup_cpu(void *blob)
 	off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
 	while (off != -FDT_ERR_NOTFOUND) {
 		reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0);
+		core_id = of_read_number(reg, addr_cells);
 		if (reg) {
-			val = spin_tbl_addr;
-			val += id_to_core(of_read_number(reg, addr_cells))
-				* SPIN_TABLE_ELEM_SIZE;
-			val = cpu_to_fdt64(val);
-			fdt_setprop_string(blob, off, "enable-method",
-					   "spin-table");
-			fdt_setprop(blob, off, "cpu-release-addr",
-				    &val, sizeof(val));
+			if (core_id  == 0 || (is_core_online(core_id))) {
+				val = spin_tbl_addr;
+				val += id_to_core(core_id) *
+				       SPIN_TABLE_ELEM_SIZE;
+				val = cpu_to_fdt64(val);
+				fdt_setprop_string(blob, off, "enable-method",
+						   "spin-table");
+				fdt_setprop(blob, off, "cpu-release-addr",
+					    &val, sizeof(val));
+			} else {
+				debug("skipping offline core\n");
+			}
 		} else {
 			puts("Warning: found cpu node without reg property\n");
 		}
diff --git a/arch/arm/cpu/armv8/fsl-lsch3/mp.c b/arch/arm/cpu/armv8/fsl-lsch3/mp.c
index 94998bf37b..ce9c0c1bdb 100644
--- a/arch/arm/cpu/armv8/fsl-lsch3/mp.c
+++ b/arch/arm/cpu/armv8/fsl-lsch3/mp.c
@@ -83,6 +83,14 @@ int is_core_valid(unsigned int core)
 	return !!((1 << core) & cpu_mask());
 }
 
+int is_core_online(u64 cpu_id)
+{
+	u64 *table;
+	int pos = id_to_core(cpu_id);
+	table = (u64 *)get_spin_tbl_addr() + pos * WORDS_PER_SPIN_TABLE_ENTRY;
+	return table[SPIN_TABLE_ELEM_STATUS_IDX] == 1;
+}
+
 int cpu_reset(int nr)
 {
 	puts("Feature is not implemented.\n");
diff --git a/arch/arm/cpu/armv8/fsl-lsch3/mp.h b/arch/arm/cpu/armv8/fsl-lsch3/mp.h
index 06ac0bcf36..66144d6101 100644
--- a/arch/arm/cpu/armv8/fsl-lsch3/mp.h
+++ b/arch/arm/cpu/armv8/fsl-lsch3/mp.h
@@ -32,5 +32,6 @@ int fsl_lsch3_wake_seconday_cores(void);
 void *get_spin_tbl_addr(void);
 phys_addr_t determine_mp_bootpg(void);
 void secondary_boot_func(void);
+int is_core_online(u64 cpu_id);
 #endif
 #endif /* _FSL_CH3_MP_H */