From: Vasily Khoruzhick Date: Wed, 29 Nov 2017 06:33:27 +0000 (-0800) Subject: sunxi: video: HDMI: split VSYNC and HSYNC polarity settings X-Git-Tag: v2018.01-rc3~14^2~10 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=64089178219371a512ddca8016d78bfdbe84565d;p=u-boot sunxi: video: HDMI: split VSYNC and HSYNC polarity settings These are actually different bits, and since some monitors (Benq BL2420PT) have modes with different HSYNC and VSYNC polarity, we should set them independently Tested on Pine64-LTS with Benq BL2420PT monitor. Signed-off-by: Vasily Khoruzhick Reviewed-by: Anatolij Gustschin Acked-by: Maxime Ripard Reviewed-by: Jagan Teki --- diff --git a/drivers/video/sunxi/sunxi_dw_hdmi.c b/drivers/video/sunxi/sunxi_dw_hdmi.c index 33920a2b67..4f01d1bded 100644 --- a/drivers/video/sunxi/sunxi_dw_hdmi.c +++ b/drivers/video/sunxi/sunxi_dw_hdmi.c @@ -304,15 +304,11 @@ static int sunxi_dw_hdmi_enable(struct udevice *dev, int panel_bpp, sunxi_dw_hdmi_lcdc_init(priv->mux, edid, panel_bpp); - /* - * Condition in original code is a bit weird. This is attempt - * to make it more reasonable and it works. It could be that - * bits and conditions are related and should be separated. - */ - if (!((edid->flags & DISPLAY_FLAGS_HSYNC_HIGH) && - (edid->flags & DISPLAY_FLAGS_VSYNC_HIGH))) { - setbits_le32(&phy->pol, 0x300); - } + if (edid->flags & DISPLAY_FLAGS_HSYNC_LOW) + setbits_le32(&phy->pol, 0x200); + + if (edid->flags & DISPLAY_FLAGS_VSYNC_LOW) + setbits_le32(&phy->pol, 0x100); setbits_le32(&phy->ctrl, 0xf << 12);