From: Tomas Vanek <vanekt@fbl.cz>
Date: Sat, 17 Sep 2016 15:36:20 +0000 (+0200)
Subject: cortex_m: fix autoincrement range of Cortex-M7
X-Git-Tag: v0.10.0-rc1~94
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=640894e7316b4e45ee4533c611a3d4c4bee6177a;p=openocd

cortex_m: fix autoincrement range of Cortex-M7

Cortex-M7 has autoincrement range only 1024 bytes,
surprisingly smaller than M3, M4.

Change-Id: I35ff1f0e093aac4af79f98eb3b8058d4295942d1
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3737
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
---

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index a6a9309e..4566e2e7 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -1976,10 +1976,14 @@ int cortex_m_examine(struct target *target)
 			armv7m->arm.core_cache->num_regs = ARMV7M_NUM_CORE_REGS_NOFP;
 		}
 
-		if ((i == 3 || i == 4 || i == 7) && !armv7m->stlink) {
-			/* Cortex-M3/M4/M7 have at least 4096 bytes autoincrement range,
-			 * s. ARM IHI 0031C: MEM-AP 7.2.2 */
-			armv7m->debug_ap->tar_autoincr_block = (1 << 12);
+		if (!armv7m->stlink) {
+			if (i == 3 || i == 4)
+				/* Cortex-M3/M4 have 4096 bytes autoincrement range,
+				 * s. ARM IHI 0031C: MEM-AP 7.2.2 */
+				armv7m->debug_ap->tar_autoincr_block = (1 << 12);
+			else if (i == 7)
+				/* Cortex-M7 has only 1024 bytes autoincrement range */
+				armv7m->debug_ap->tar_autoincr_block = (1 << 10);
 		}
 
 		/* Configure trace modules */