From: Eugeniy Paltsev Date: Tue, 28 Nov 2017 13:51:07 +0000 (+0300) Subject: ARC: add defines of some cache and xCCM AUX registers X-Git-Tag: v2018.01-rc2~36^2~2 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=64f47426315112e67af1214474659e0a55383dcc;p=u-boot ARC: add defines of some cache and xCCM AUX registers Signed-off-by: Eugeniy Paltsev Signed-off-by: Alexey Brodkin --- diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h index 2a1bfc74ec..ba1f7bac77 100644 --- a/arch/arc/include/asm/arcregs.h +++ b/arch/arc/include/asm/arcregs.h @@ -27,6 +27,12 @@ #define ARC_AUX_IC_PTAG 0x1E #endif #define ARC_BCR_IC_BUILD 0x77 +#define AUX_AUX_CACHE_LIMIT 0x5D +#define ARC_AUX_NON_VOLATILE_LIMIT 0x5E + +/* ICCM and DCCM auxiliary registers */ +#define ARC_AUX_DCCM_BASE 0x18 /* DCCM Base Addr ARCv2 */ +#define ARC_AUX_ICCM_BASE 0x208 /* ICCM Base Addr ARCv2 */ /* Timer related auxiliary registers */ #define ARC_AUX_TIMER0_CNT 0x21 /* Timer 0 count */