From: Anton Vorontsov Date: Wed, 14 Nov 2007 15:54:53 +0000 (+0300) Subject: MPC8360E-MDS: configure and enable second UART X-Git-Tag: v1.3.2-rc1~102^2~49^2~25^2~20 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=651d96f7e4c84adcdb98ef07ec878c20326e3359;p=u-boot MPC8360E-MDS: configure and enable second UART Despite user manual, BCSR9.7 is negated (high) on HRST, so UART2 is disabled. Fix that and configure QE pins properly. Signed-off-by: Anton Vorontsov --- diff --git a/board/freescale/mpc8360emds/mpc8360emds.c b/board/freescale/mpc8360emds/mpc8360emds.c index e050cd4395..538a556c60 100644 --- a/board/freescale/mpc8360emds/mpc8360emds.c +++ b/board/freescale/mpc8360emds/mpc8360emds.c @@ -87,6 +87,11 @@ const qe_iop_conf_t qe_iop_conf_tab[] = { {0, 1, 3, 0, 2}, /* MDIO */ {0, 2, 1, 0, 1}, /* MDC */ + {5, 0, 1, 0, 2}, /* UART2_SOUT */ + {5, 1, 2, 0, 3}, /* UART2_CTS */ + {5, 2, 1, 0, 1}, /* UART2_RTS */ + {5, 3, 2, 0, 2}, /* UART2_SIN */ + {0, 0, 0, 0, QE_IOP_TAB_END}, /* END of table */ }; @@ -106,6 +111,9 @@ int board_early_init_f(void) immr->sysconf.spridr == SPR_8360E_REV21) bcsr[0xe] = 0x30; + /* Enable second UART */ + bcsr[0x9] &= ~0x01; + return 0; }