From: Dave Liu <daveliu@freescale.com>
Date: Thu, 22 Oct 2009 05:10:23 +0000 (-0500)
Subject: ppc/85xx: Make L2 support more robust
X-Git-Tag: v2009.11-rc1~7^2~13
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=654ea1f3184235694306ddc5874baa27ad3018fe;p=u-boot

ppc/85xx: Make L2 support more robust

According the user manual, we need loop-check the L2 enable bit set.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---

diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c
index 53369349d1..0041a60df9 100644
--- a/cpu/mpc85xx/cpu_init.c
+++ b/cpu/mpc85xx/cpu_init.c
@@ -360,8 +360,11 @@ int cpu_init_r(void)
 	/* enable the cache */
 	mtspr(SPRN_L2CSR0, CONFIG_SYS_INIT_L2CSR0);
 
-	if (CONFIG_SYS_INIT_L2CSR0 & L2CSR0_L2E)
+	if (CONFIG_SYS_INIT_L2CSR0 & L2CSR0_L2E) {
+		while (!(mfspr(SPRN_L2CSR0) & L2CSR0_L2E))
+			;
 		printf("%d KB enabled\n", (l2cfg0 & 0x3fff) * 64);
+	}
 #else
 	puts("disabled\n");
 #endif