From: Erik van Luijk Date: Thu, 13 Aug 2015 13:43:19 +0000 (+0200) Subject: arm: at91: at91sam9m10g45ek/corvus remove useless chip select 1 init X-Git-Tag: v2015.10-rc3~104 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=6560491fe5acd2f150853efdd5d9bd714a93374c;p=u-boot arm: at91: at91sam9m10g45ek/corvus remove useless chip select 1 init On these boards the DDR is connected to a dedicated controller and not to chip select 1 of the EBI. Signed-off-by: Erik van Luijk Tested-by: Erik van Luijk --- diff --git a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c index 3e65d711c0..d2ade4d066 100644 --- a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c +++ b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c @@ -131,21 +131,13 @@ static void ddr2_conf(struct atmel_mpddr *ddr2) void mem_init(void) { struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - struct at91_matrix *mat = (struct at91_matrix *)ATMEL_BASE_MATRIX; struct atmel_mpddr ddr2; - unsigned long csa; ddr2_conf(&ddr2); /* enable DDR2 clock */ writel(0x4, &pmc->scer); - /* Chip select 1 is for DDR2/SDRAM */ - csa = readl(&mat->ebicsa); - csa |= AT91_MATRIX_EBI_CS1A_SDRAMC; - csa &= ~AT91_MATRIX_EBI_VDDIOMSEL_3_3V; - writel(csa, &mat->ebicsa); - /* DDRAM2 Controller initialize */ ddr2_init(ATMEL_BASE_DDRSDRC0, ATMEL_BASE_CS6, &ddr2); } diff --git a/board/siemens/corvus/board.c b/board/siemens/corvus/board.c index 9001fcbcf5..d74743f74c 100644 --- a/board/siemens/corvus/board.c +++ b/board/siemens/corvus/board.c @@ -144,21 +144,13 @@ static void ddr2_conf(struct atmel_mpddr *ddr2) void mem_init(void) { struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; - struct at91_matrix *mat = (struct at91_matrix *)ATMEL_BASE_MATRIX; struct atmel_mpddr ddr2; - unsigned long csa; ddr2_conf(&ddr2); /* enable DDR2 clock */ writel(0x4, &pmc->scer); - /* Chip select 1 is for DDR2/SDRAM */ - csa = readl(&mat->ebicsa); - csa |= AT91_MATRIX_EBI_CS1A_SDRAMC; - csa &= ~AT91_MATRIX_EBI_VDDIOMSEL_3_3V; - writel(csa, &mat->ebicsa); - /* DDRAM2 Controller initialize */ ddr2_init(ATMEL_BASE_DDRSDRC0, ATMEL_BASE_CS6, &ddr2); }