From: Matthias Welwarsky Date: Thu, 6 Oct 2016 14:11:19 +0000 (+0200) Subject: aarch64: simplify armv8_set_cpsr() X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=675b0170f2752c285de359f235e50a208f7f138a;p=openocd aarch64: simplify armv8_set_cpsr() Translate from cpsr value to "enum arm_mode" by shifting up 4 bits and filling the lowest nibble with 0xF. Change-Id: Ic32186104b0c29578c4f6f99e04840ab88a0017b Signed-off-by: Matthias Welwarsky --- diff --git a/src/target/armv8.c b/src/target/armv8.c index 3f3127e1..a572e23e 100644 --- a/src/target/armv8.c +++ b/src/target/armv8.c @@ -282,36 +282,10 @@ void armv8_set_cpsr(struct arm *arm, uint32_t cpsr) } } arm->core_state = state; - if (arm->core_state == ARM_STATE_AARCH64) { - switch (mode) { - case SYSTEM_AAR64_MODE_EL0t: - arm->core_mode = ARMV8_64_EL0T; - break; - case SYSTEM_AAR64_MODE_EL1t: - arm->core_mode = ARMV8_64_EL0T; - break; - case SYSTEM_AAR64_MODE_EL1h: - arm->core_mode = ARMV8_64_EL1H; - break; - case SYSTEM_AAR64_MODE_EL2t: - arm->core_mode = ARMV8_64_EL2T; - break; - case SYSTEM_AAR64_MODE_EL2h: - arm->core_mode = ARMV8_64_EL2H; - break; - case SYSTEM_AAR64_MODE_EL3t: - arm->core_mode = ARMV8_64_EL3T; - break; - case SYSTEM_AAR64_MODE_EL3h: - arm->core_mode = ARMV8_64_EL3H; - break; - default: - LOG_DEBUG("unknow mode 0x%x", (unsigned) (mode)); - break; - } - } else { + if (arm->core_state == ARM_STATE_AARCH64) + arm->core_mode = (mode << 4) | 0xf; + else arm->core_mode = mode; - } LOG_DEBUG("set CPSR %#8.8x: %s mode, %s state", (unsigned) cpsr, armv8_mode_name(arm->core_mode),