From: Mike Frysinger Date: Sun, 12 Oct 2008 01:46:52 +0000 (-0400) Subject: Blackfin: check for reserved settings in DDR MMRs X-Git-Tag: v2009.03-rc1~109^2~4^2~3 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=67619982bfc5cd62710a48e3cbffc304cb78c341;p=u-boot Blackfin: check for reserved settings in DDR MMRs Some bits of the DDR MMRs should not be set. If they do, bad things may happen (like random failures or hardware destruction). Signed-off-by: Mike Frysinger --- diff --git a/cpu/blackfin/initcode.c b/cpu/blackfin/initcode.c index aafad10bde..71f33759e0 100644 --- a/cpu/blackfin/initcode.c +++ b/cpu/blackfin/initcode.c @@ -168,11 +168,18 @@ static inline void serial_putc(char c) #ifndef CONFIG_EBIU_RSTCTL_VAL # define CONFIG_EBIU_RSTCTL_VAL 0 /* only MDDRENABLE is useful */ #endif +#if ((CONFIG_EBIU_RSTCTL_VAL & 0xFFFFFFC4) != 0) +# error invalid EBIU_RSTCTL value: must not set reserved bits +#endif #ifndef CONFIG_EBIU_MBSCTL_VAL # define CONFIG_EBIU_MBSCTL_VAL 0 #endif +#if defined(CONFIG_EBIU_DDRQUE_VAL) && ((CONFIG_EBIU_DDRQUE_VAL & 0xFFFF8000) != 0) +# error invalid EBIU_DDRQUE value: must not set reserved bits +#endif + /* Make sure our voltage value is sane so we don't blow up! */ #ifndef CONFIG_VR_CTL_VAL # define BFIN_CCLK ((CONFIG_CLKIN_HZ * CONFIG_VCO_MULT) / CONFIG_CCLK_DIV)