From: Sanjeev Premi <premi@ti.com>
Date: Mon, 18 Jul 2011 13:20:15 +0000 (-0400)
Subject: omap3evm: eth: split function setup_net_chip
X-Git-Tag: v2011.09-rc1~85^2~56
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=6921b314a855b3c4856ef5ef83315fe945de98b2;p=u-boot

omap3evm: eth: split function setup_net_chip

In current implementation, the function sets up the ethernet
chip and resets it. The steps to reset depend upon the board
revision.

The patch moves the reset actions to new function reset_net_chip().

Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
---

diff --git a/board/ti/evm/evm.c b/board/ti/evm/evm.c
index aaf3033b04..8f9f141682 100644
--- a/board/ti/evm/evm.c
+++ b/board/ti/evm/evm.c
@@ -130,6 +130,9 @@ int misc_init_r(void)
 #endif
 	omap3_evm_get_revision();
 
+#if defined(CONFIG_CMD_NET)
+	reset_net_chip();
+#endif
 	dieid_num_r();
 
 	return 0;
@@ -153,7 +156,6 @@ void set_muxconf_regs(void)
  */
 static void setup_net_chip(void)
 {
-	struct gpio *gpio3_base = (struct gpio *)OMAP34XX_GPIO3_BASE;
 	struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
 
 	/* Configure GPMC registers */
@@ -172,6 +174,14 @@ static void setup_net_chip(void)
 	/* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
 	writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
 		&ctrl_base->gpmc_nadv_ale);
+}
+
+/**
+ * Reset the ethernet chip.
+ */
+static void reset_net_chip(void)
+{
+	struct gpio *gpio3_base = (struct gpio *)OMAP34XX_GPIO3_BASE;
 
 	/* Make GPIO 64 as output pin */
 	writel(readl(&gpio3_base->oe) & ~(GPIO0), &gpio3_base->oe);
diff --git a/board/ti/evm/evm.h b/board/ti/evm/evm.h
index b721ad6af5..623cf1bb18 100644
--- a/board/ti/evm/evm.h
+++ b/board/ti/evm/evm.h
@@ -49,6 +49,7 @@ u32 get_omap3_evm_rev(void);
 
 #if defined(CONFIG_CMD_NET)
 static void setup_net_chip(void);
+static void reset_net_chip(void);
 #endif
 
 /*