From: ntfreak <ntfreak@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Date: Tue, 18 Aug 2009 19:55:01 +0000 (+0000)
Subject: David Brownell [david-b@pacbell.net]:
X-Git-Tag: v0.3.0-rc0~357
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=69dd81dcf807afebdbf9644bf2baf023de373f25;p=openocd

David Brownell [david-b@pacbell.net]:

Simplify dumping of register lists by only printing cached values
if they are marked as valid.  Most of the time, they are invalid;
so printing *any* value is just misleading.

Note that for ARM7 and ARM9 most EmbeddedICE registers (except for
debug status) could be cached most of the time; and their register
cache isn't maintained properly (many accesses seem to bypass that
cache code).

git-svn-id: svn://svn.berlios.de/openocd/trunk@2594 b42882b7-edfa-0310-969c-e2dbd0fdcd60
---

diff --git a/src/target/target.c b/src/target/target.c
index 670b4ba8..94609078 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -1741,17 +1741,28 @@ static int handle_reg_command(struct command_context_s *cmd_ctx, char *cmd, char
 		while (cache)
 		{
 			int i;
-			for (i = 0; i < cache->num_regs; i++)
+
+			for (i = 0, reg = cache->reg_list;
+					i < cache->num_regs;
+					i++, reg++, count++)
 			{
-				value = buf_to_str(cache->reg_list[i].value, cache->reg_list[i].size, 16);
-				command_print(cmd_ctx, "(%i) %s (/%i): 0x%s (dirty: %i, valid: %i)",
-							  count++,
-							  cache->reg_list[i].name,
-							  (int)(cache->reg_list[i].size),
-							  value,
-							  cache->reg_list[i].dirty,
-							  cache->reg_list[i].valid);
-				free(value);
+				/* only print cached values if they are valid */
+				if (reg->valid) {
+					value = buf_to_str(reg->value,
+							reg->size, 16);
+					command_print(cmd_ctx,
+							"(%i) %s (/%u): 0x%s%s",
+							count, reg->name,
+							reg->size, value,
+							reg->dirty
+								? " (dirty)"
+								: "");
+					free(value);
+				} else {
+					command_print(cmd_ctx, "(%i) %s (/%u)",
+							  count, reg->name,
+							  reg->size) ;
+				}
 			}
 			cache = cache->next;
 		}