From: Masahiro Yamada Date: Mon, 21 Oct 2013 01:10:32 +0000 (+0900) Subject: EP88x: remove remainders of dead board X-Git-Tag: v2014.01-rc1~112 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=6dca9450a2808df57340f00178ad7313b64cb2fe;p=u-boot EP88x: remove remainders of dead board Commit 1b0757e deleted the EP88x entry from boards.cfg file. But it missed to remove include/configs/EP88x.h and board/ep88x/. This commit removes them and adds EP88x to README.scrapyard. Signed-off-by: Masahiro Yamada Cc: Wolfgang Denk --- diff --git a/board/ep88x/Makefile b/board/ep88x/Makefile deleted file mode 100644 index 07fa3f3a2f..0000000000 --- a/board/ep88x/Makefile +++ /dev/null @@ -1,31 +0,0 @@ -# -# (C) Copyright 2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# Copyright (C) 2004 Arabella Software Ltd. -# Yuli Barcohen -# -# SPDX-License-Identifier: GPL-2.0+ -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).o - -COBJS := $(BOARD).o - -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) - $(call cmd_link_o_target, $(OBJS)) - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/ep88x/ep88x.c b/board/ep88x/ep88x.c deleted file mode 100644 index cad0bfc6ca..0000000000 --- a/board/ep88x/ep88x.c +++ /dev/null @@ -1,117 +0,0 @@ -/* - * Copyright (C) 2005 Arabella Software Ltd. - * Yuli Barcohen - * - * Support for Embedded Planet EP88x boards. - * Tested on EP88xC with MPC885 CPU, 64MB SDRAM and 16MB flash. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include - -/* - * SDRAM uses two Micron chips. - * Minimal CPU frequency is 40MHz. - */ -static uint sdram_table[] = { - /* Single read (offset 0x00 in UPM RAM) */ - 0xEFCBCC04, 0x0F37C804, 0x0EEEC004, 0x01B98404, - 0x1FF74C00, 0xFFFFCC05, 0xFFFFCC05, 0xFFFFCC05, - - /* Burst read (offset 0x08 in UPM RAM) */ - 0xEFCBCC04, 0x0F37C804, 0x0EEEC004, 0x00BDC404, - 0x00FFCC00, 0x00FFCC00, 0x01FB8C00, 0x1FF74C00, - 0xFFFFCC05, 0xFFFFCC05, 0xFFFFCC05, 0xFFFFCC05, - 0xFFFFCC05, 0xFFFFCC05, 0xFFFFCC05, 0xFFFFCC05, - - /* Single write (offset 0x18 in UPM RAM) */ - 0xEFCBCC04, 0x0F37C804, 0x0EEE8002, 0x01B90404, - 0x1FF74C05, 0xFFFFCC05, 0xFFFFCC05, 0xFFFFCC05, - - /* Burst write (offset 0x20 in UPM RAM) */ - 0xEFCBCC04, 0x0F37C804, 0x0EEE8000, 0x00BD4400, - 0x00FFCC00, 0x00FFCC02, 0x01FB8C04, 0x1FF74C05, - 0xFFFFCC05, 0xFFFFCC05, 0xFFFFCC05, 0xFFFFCC05, - 0xFFFFCC05, 0xFFFFCC05, 0xFFFFCC05, 0xFFFFCC05, - - /* Refresh (offset 0x30 in UPM RAM) */ - 0xEFFACC04, 0x0FF5CC04, 0x0FFFCC04, 0x1FFFCC04, - 0xFFFFCC05, 0xFFFFCC05, 0xEFFB8C34, 0x0FF74C34, - 0x0FFACCB4, 0x0FF5CC34, 0x0FFFC034, 0x0FFFC0B4, - - /* Exception (offset 0x3C in UPM RAM) */ - 0x0FEA8034, 0x1FB54034, 0xFFFFCC34, 0xFFFFCC05 -}; - -int board_early_init_f (void) -{ - vu_char *bcsr = (vu_char *)CONFIG_SYS_BCSR; - - bcsr[0] |= 0x0C; /* Turn the LEDs off */ - bcsr[2] |= 0x08; /* Enable flash WE# line - necessary for - flash detection by CFI driver - */ - -#if defined(CONFIG_8xx_CONS_SMC1) - bcsr[6] |= 0x10; /* Enables RS-232 transceiver */ -#endif -#if defined(CONFIG_8xx_CONS_SCC2) - bcsr[7] |= 0x10; /* Enables RS-232 transceiver */ -#endif -#ifdef CONFIG_ETHER_ON_FEC1 - bcsr[8] |= 0xC0; /* Enable Ethernet 1 PHY */ -#endif -#ifdef CONFIG_ETHER_ON_FEC2 - bcsr[8] |= 0x30; /* Enable Ethernet 2 PHY */ -#endif - - return 0; -} - -phys_size_t initdram (int board_type) -{ - long int msize; - volatile immap_t *immap = (volatile immap_t *)CONFIG_SYS_IMMR; - volatile memctl8xx_t *memctl = &immap->im_memctl; - - upmconfig(UPMA, sdram_table, sizeof(sdram_table) / sizeof(uint)); - - /* Configure SDRAM refresh */ - memctl->memc_mptpr = MPTPR_PTP_DIV2; /* BRGCLK/2 */ - - memctl->memc_mamr = (65 << 24) | CONFIG_SYS_MAMR; /* No refresh */ - udelay(100); - - /* Run MRS pattern from location 0x36 */ - memctl->memc_mar = 0x88; - memctl->memc_mcr = 0x80002236; - udelay(100); - - memctl->memc_mamr |= MAMR_PTAE; /* Enable refresh */ - memctl->memc_or1 = ~(CONFIG_SYS_SDRAM_MAX_SIZE - 1) | OR_CSNT_SAM; - memctl->memc_br1 = CONFIG_SYS_SDRAM_BASE | BR_PS_32 | BR_MS_UPMA | BR_V; - - msize = get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_SDRAM_MAX_SIZE); - memctl->memc_or1 |= ~(msize - 1); - - return msize; -} - -int checkboard( void ) -{ - vu_char *bcsr = (vu_char *)CONFIG_SYS_BCSR; - - puts("Board: "); - switch (bcsr[15]) { - case 0xE7: - puts("EP88xC 1.0"); - break; - default: - printf("unknown ID=%02X", bcsr[15]); - } - printf(" CPLD revision %d\n", bcsr[14]); - - return 0; -} diff --git a/board/ep88x/u-boot.lds b/board/ep88x/u-boot.lds deleted file mode 100644 index cbb17d1aee..0000000000 --- a/board/ep88x/u-boot.lds +++ /dev/null @@ -1,79 +0,0 @@ -/* - * (C) Copyright 2001-2010 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * Modified by Yuli Barcohen - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(powerpc) -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .text : - { - arch/powerpc/cpu/mpc8xx/start.o (.text*) - arch/powerpc/cpu/mpc8xx/traps.o (.text*) - *(.text*) - . = ALIGN(16); - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x0FFF) & 0xFFFFF000; - _erotext = .; - PROVIDE (erotext = .); - .reloc : - { - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - KEEP(*(.got)) - PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4); - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2; - __fixup_entries = (. - _FIXUP_TABLE_) >> 2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(4096); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(4096); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - *(.bss*) - *(.sbss*) - *(COMMON) - . = ALIGN(4); - } - __bss_end = . ; - PROVIDE (end = .); -} -ENTRY(_start) diff --git a/doc/README.scrapyard b/doc/README.scrapyard index 48557c4005..7cfb3a3772 100644 --- a/doc/README.scrapyard +++ b/doc/README.scrapyard @@ -20,6 +20,7 @@ smdk6400 arm arm1176 52587f1 2013-04-12 Zhong Hongbo ns9750dev arm arm926ejs 4cfc611 2013-02-28 Markus Pietrek AMX860 powerpc mpc860 1b0757e 2012-10-28 Wolfgang Denk c2mon powerpc mpc855 1b0757e 2012-10-28 Wolfgang Denk +EP88x powerpc mpc885 1b0757e 2012-10-28 ETX094 powerpc mpc850 1b0757e 2012-10-28 Wolfgang Denk IAD210 powerpc mpc860 1b0757e 2012-10-28 - LANTEC powerpc mpc850 1b0757e 2012-10-28 Wolfgang Denk diff --git a/include/configs/EP88x.h b/include/configs/EP88x.h deleted file mode 100644 index e6d1385aaa..0000000000 --- a/include/configs/EP88x.h +++ /dev/null @@ -1,187 +0,0 @@ -/* - * Copyright (C) 2005 Arabella Software Ltd. - * Yuli Barcohen - * - * Support for Embedded Planet EP88x boards. - * Tested on EP88xC with MPC885 CPU, 64MB SDRAM and 16MB flash. - * - * SPDX-License-Identifier: GPL-2.0+ - */ -#ifndef __CONFIG_H -#define __CONFIG_H - -#define CONFIG_MPC885 - -#define CONFIG_EP88X /* Embedded Planet EP88x board */ - -#define CONFIG_SYS_TEXT_BASE 0xFC000000 - -#define CONFIG_BOARD_EARLY_INIT_F /* Call board_early_init_f */ - -/* Allow serial number (serial#) and MAC address (ethaddr) to be overwritten */ -#define CONFIG_ENV_OVERWRITE - -#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ -#define CONFIG_BAUDRATE 38400 - -#define CONFIG_ETHER_ON_FEC1 /* Enable Ethernet on FEC1 */ -#define CONFIG_ETHER_ON_FEC2 /* Enable Ethernet on FEC2 */ -#if defined(CONFIG_ETHER_ON_FEC1) || defined(CONFIG_ETHER_ON_FEC2) -#define CONFIG_SYS_DISCOVER_PHY -#define CONFIG_MII_INIT 1 -#define FEC_ENET -#endif /* CONFIG_FEC_ENET */ - -#define CONFIG_8xx_OSCLK 10000000 /* 10 MHz oscillator on EXTCLK */ -#define CONFIG_8xx_CPUCLK_DEFAULT 100000000 -#define CONFIG_SYS_8xx_CPUCLK_MIN 40000000 -#define CONFIG_SYS_8xx_CPUCLK_MAX 133000000 - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ -#include - -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_IMMAP -#define CONFIG_CMD_MII -#define CONFIG_CMD_PING - - -#define CONFIG_BOOTDELAY 5 /* Autoboot after 5 seconds */ -#define CONFIG_BOOTCOMMAND "bootm fe060000" /* Autoboot command */ -#define CONFIG_BOOTARGS "root=/dev/mtdblock1 rw mtdparts=phys:2M(ROM)ro,-(root)" - -#define CONFIG_BZIP2 /* Include support for bzip2 compressed images */ -#undef CONFIG_WATCHDOG /* Disable platform specific watchdog */ - -/*----------------------------------------------------------------------- - * Miscellaneous configurable options - */ -#define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_LONGHELP /* #undef to save memory */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS 16 /* Max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_LOAD_ADDR 0x400000 /* Default load address */ - -/*----------------------------------------------------------------------- - * RAM configuration (note that CONFIG_SYS_SDRAM_BASE must be zero) - */ -#define CONFIG_SYS_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_MAX_SIZE 0x08000000 /* Up to 128 Mbyte */ - -#define CONFIG_SYS_MAMR 0x00805000 - -/* - * 4096 Up to 4096 SDRAM rows - * 1000 factor s -> ms - * 32 PTP (pre-divider from MPTPR) - * 4 Number of refresh cycles per period - * 64 Refresh cycle in ms per number of rows - */ -#define CONFIG_SYS_PTA_PER_CLK ((4096 * 32 * 1000) / (4 * 64)) - -#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */ -#define CONFIG_SYS_MEMTEST_END 0x00500000 /* 1 ... 5 MB in SDRAM */ - -#define CONFIG_SYS_RESET_ADDRESS 0x09900000 - -/*----------------------------------------------------------------------- - * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 KB for Monitor */ -#ifdef CONFIG_BZIP2 -#define CONFIG_SYS_MALLOC_LEN (4096 << 10) /* Reserve ~4 MB for malloc() */ -#else -#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 KB for malloc() */ -#endif /* CONFIG_BZIP2 */ - -/*----------------------------------------------------------------------- - * Flash organisation - */ -#define CONFIG_SYS_FLASH_BASE 0xFC000000 -#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */ -#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */ -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Max number of flash banks */ -#define CONFIG_SYS_MAX_FLASH_SECT 512 /* Max num of sects on one chip */ - -/* Environment is in flash */ -#define CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_SECT_SIZE 0x20000 /* We use one complete sector */ -#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) - -#define CONFIG_SYS_OR0_PRELIM 0xFC000160 -#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | BR_PS_32 | BR_MS_GPCM | BR_V) - -#define CONFIG_SYS_DIRECT_FLASH_TFTP - -/*----------------------------------------------------------------------- - * BCSR - */ -#define CONFIG_SYS_OR3_PRELIM 0xFF0005B0 -#define CONFIG_SYS_BR3_PRELIM (0xFA000000 |BR_PS_16 | BR_MS_GPCM | BR_V) - -#define CONFIG_SYS_BCSR 0xFA400000 - -/*----------------------------------------------------------------------- - * Internal Memory Map Register - */ -#define CONFIG_SYS_IMMR 0xF0000000 - -/*----------------------------------------------------------------------- - * Definitions for initial stack pointer and data area (in DPRAM) - */ -#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_IMMR -#define CONFIG_SYS_INIT_RAM_SIZE 0x2F00 /* Size of used area in DPRAM */ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -/*----------------------------------------------------------------------- - * Configuration registers - */ -#ifdef CONFIG_WATCHDOG -#define CONFIG_SYS_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | \ - SYPCR_SWF | SYPCR_SWE | SYPCR_SWRI | \ - SYPCR_SWP) -#else -#define CONFIG_SYS_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | \ - SYPCR_SWF | SYPCR_SWP) -#endif /* CONFIG_WATCHDOG */ - -#define CONFIG_SYS_SIUMCR (SIUMCR_MLRC01 | SIUMCR_DBGC11) - -/* TBSCR - Time Base Status and Control Register */ -#define CONFIG_SYS_TBSCR (TBSCR_TBF | TBSCR_TBE) - -/* PISCR - Periodic Interrupt Status and Control */ -#define CONFIG_SYS_PISCR PISCR_PS - -/* SCCR - System Clock and reset Control Register */ -#define SCCR_MASK SCCR_EBDF11 -#define CONFIG_SYS_SCCR SCCR_RTSEL - -#define CONFIG_SYS_DER 0 - -/*----------------------------------------------------------------------- - * Cache Configuration - */ -#define CONFIG_SYS_CACHELINE_SIZE 16 /* For all MPC8xx chips */ - -#endif /* __CONFIG_H */