From: Jagan Teki <jteki@openedev.com>
Date: Sat, 15 Aug 2015 17:32:31 +0000 (+0530)
Subject: dts: zynq: Add zynq qspi controller nodes
X-Git-Tag: v2016.01-rc1~155^2~50
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=70676cb3b503bea970eb4e1dd7ea902ec8ac2ea1;p=u-boot

dts: zynq: Add zynq qspi controller nodes

This patch adds zynq qspi controller nodes in zynq-7000.dtsi.

Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Jagan Teki <jteki@openedev.com>
---

diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi
index 0b62cb0936..84c15b5c79 100644
--- a/arch/arm/dts/zynq-7000.dtsi
+++ b/arch/arm/dts/zynq-7000.dtsi
@@ -191,6 +191,18 @@
 			#size-cells = <0>;
 		};
 
+		qspi: spi@e000d000 {
+			clock-names = "ref_clk", "pclk";
+			clocks = <&clkc 10>, <&clkc 43>;
+			compatible = "xlnx,zynq-qspi-1.0";
+			status = "disabled";
+			interrupt-parent = <&intc>;
+			interrupts = <0 19 4>;
+			reg = <0xe000d000 0x1000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+		};
+
 		gem0: ethernet@e000b000 {
 			compatible = "cdns,zynq-gem", "cdns,gem";
 			reg = <0xe000b000 0x1000>;