From: Anton Vorontsov <avorontsov@ru.mvista.com>
Date: Thu, 15 Oct 2009 13:47:11 +0000 (+0400)
Subject: mpc85xx: Setup QE pinmux for SPI Flash on MPC8569E-MDS boards
X-Git-Tag: v2009.11-rc1~7^2~2
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=70d665b1d230b9575a647948e8db3da1e6743e5c;p=u-boot

mpc85xx: Setup QE pinmux for SPI Flash on MPC8569E-MDS boards

SPI Flash (M25P40) is connected to the SPI1 bus, we need a few
qe_iop entries to actually enable SPI1 on these boards.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---

diff --git a/board/freescale/mpc8569mds/mpc8569mds.c b/board/freescale/mpc8569mds/mpc8569mds.c
index 2d07922161..7d1d02e7d2 100644
--- a/board/freescale/mpc8569mds/mpc8569mds.c
+++ b/board/freescale/mpc8569mds/mpc8569mds.c
@@ -154,6 +154,12 @@ const qe_iop_conf_t qe_iop_conf_tab[] = {
 	{5, 10, 2, 0, 3}, /* UART1_CTS_B */
 	{5, 11, 1, 0, 2}, /* UART1_RTS_B */
 
+	/* SPI Flash, M25P40                           */
+	{4, 27, 3, 0, 1}, /* SPI_MOSI                  */
+	{4, 28, 3, 0, 1}, /* SPI_MISO                  */
+	{4, 29, 3, 0, 1}, /* SPI_CLK                   */
+	{4, 30, 1, 0, 0}, /* SPI_SEL, GPIO             */
+
 	{0,  0, 0, 0, QE_IOP_TAB_END} /* END of table */
 };