From: uz Date: Wed, 17 Nov 2010 13:00:34 +0000 (+0000) Subject: Changed the startup module and the linker config for the C128 to use the X-Git-Tag: V2.13.3~583 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=7252f071a2079586e586b5bf12282546fc220503;p=cc65 Changed the startup module and the linker config for the C128 to use the common loadaddr and exehdr modules. git-svn-id: svn://svn.cc65.org/cc65/trunk@4872 b7a2c559-68d2-44c3-8de9-860c34a00d81 --- diff --git a/libsrc/c128/crt0.s b/libsrc/c128/crt0.s index be478e368..97cad58fa 100644 --- a/libsrc/c128/crt0.s +++ b/libsrc/c128/crt0.s @@ -20,22 +20,6 @@ IRQInd = $2FD ; JMP $0000 - used as indirect IRQ vector -; ------------------------------------------------------------------------ -; BASIC header with a SYS call - -.segment "EXEHDR" - - .word Head ; Load address -Head: .word @Next - .word .version ; Line number - .byte $9E ; SYS token - .byte <(((Start / 1000) .mod 10) + '0') - .byte <(((Start / 100) .mod 10) + '0') - .byte <(((Start / 10) .mod 10) + '0') - .byte <(((Start / 1) .mod 10) + '0') - .byte $00 ; End of BASIC line -@Next: .word 0 ; BASIC end marker - ; ------------------------------------------------------------------------ ; Startup code diff --git a/src/ld65/cfg/c128.cfg b/src/ld65/cfg/c128.cfg index 9dfedf999..f521f4002 100644 --- a/src/ld65/cfg/c128.cfg +++ b/src/ld65/cfg/c128.cfg @@ -1,22 +1,26 @@ SYMBOLS { + __LOADADDR__: type = import; + __EXEHDR__: type = import; __STACKSIZE__: type = weak, value = $0800; # 2k stack } MEMORY { - ZP: file = "", define = yes, start = $0002, size = $001A; - HEADER: file = %O, start = $1BFF, size = $000E; - RAM: file = %O, define = yes, start = $1C0D, size = $A3F3 - __STACKSIZE__; + ZP: file = "", define = yes, start = $0002, size = $001A; + LOADADDR: file = %O, start = $1BFF, size = $0002; + HEADER: file = %O, start = $1C01, size = $000C; + RAM: file = %O, define = yes, start = $1C0D, size = $A3F3 - __STACKSIZE__; } SEGMENTS { - EXEHDR: load = HEADER, type = ro; - STARTUP: load = RAM, type = ro; - LOWCODE: load = RAM, type = ro, optional = yes; - INIT: load = RAM, type = ro, define = yes, optional = yes; - CODE: load = RAM, type = ro; - RODATA: load = RAM, type = ro; - DATA: load = RAM, type = rw; - ZPSAVE: load = RAM, type = bss; - BSS: load = RAM, type = bss, define = yes; - ZEROPAGE: load = ZP, type = zp; + LOADADDR: load = LOADADDR, type = ro; + EXEHDR: load = HEADER, type = ro; + STARTUP: load = RAM, type = ro; + LOWCODE: load = RAM, type = ro, optional = yes; + INIT: load = RAM, type = ro, define = yes, optional = yes; + CODE: load = RAM, type = ro; + RODATA: load = RAM, type = ro; + DATA: load = RAM, type = rw; + ZPSAVE: load = RAM, type = bss; + BSS: load = RAM, type = bss, define = yes; + ZEROPAGE: load = ZP, type = zp; } FEATURES { CONDES: segment = INIT,