From: Masahiro Yamada Date: Sun, 12 Mar 2017 15:16:41 +0000 (+0900) Subject: ARM: dts: uniphier: more re-sync DT with Linux X-Git-Tag: v2017.05-rc1~95 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=7317a94085b2146811d9d1350b26d562b98aebac;p=u-boot ARM: dts: uniphier: more re-sync DT with Linux For better maintainability. Signed-off-by: Masahiro Yamada --- diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi index 8488984669..2843adb01e 100644 --- a/arch/arm/dts/uniphier-ld11.dtsi +++ b/arch/arm/dts/uniphier-ld11.dtsi @@ -318,7 +318,7 @@ }; mioctrl@5b3e0000 { - compatible = "socionext,uniphier-mioctrl", + compatible = "socionext,uniphier-ld11-mioctrl", "simple-mfd", "syscon"; reg = <0x5b3e0000 0x800>; diff --git a/arch/arm/dts/uniphier-pinctrl.dtsi b/arch/arm/dts/uniphier-pinctrl.dtsi index 2810f3b3e1..9591e888dc 100644 --- a/arch/arm/dts/uniphier-pinctrl.dtsi +++ b/arch/arm/dts/uniphier-pinctrl.dtsi @@ -1,7 +1,8 @@ /* * Device Tree Source for UniPhier SoCs default pinctrl settings * - * Copyright (C) 2015 Masahiro Yamada + * Copyright (C) 2015-2017 Socionext Inc. + * Author: Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ X11 */ diff --git a/arch/arm/dts/uniphier-pro4-ace.dts b/arch/arm/dts/uniphier-pro4-ace.dts index 0183df0fdc..679e48b5ae 100644 --- a/arch/arm/dts/uniphier-pro4-ace.dts +++ b/arch/arm/dts/uniphier-pro4-ace.dts @@ -54,6 +54,7 @@ eeprom@54 { compatible = "st,24c64", "i2c-eeprom"; reg = <0x54>; + pagesize = <32>; u-boot,i2c-offset-len = <2>; }; }; diff --git a/arch/arm/dts/uniphier-pro4-sanji.dts b/arch/arm/dts/uniphier-pro4-sanji.dts index 11016a4b8d..25e73c6853 100644 --- a/arch/arm/dts/uniphier-pro4-sanji.dts +++ b/arch/arm/dts/uniphier-pro4-sanji.dts @@ -49,6 +49,7 @@ eeprom@54 { compatible = "st,24c64", "i2c-eeprom"; reg = <0x54>; + pagesize = <32>; u-boot,i2c-offset-len = <2>; }; }; diff --git a/arch/arm/dts/uniphier-pxs2-gentil.dts b/arch/arm/dts/uniphier-pxs2-gentil.dts index a26d586c76..0c0a9cf821 100644 --- a/arch/arm/dts/uniphier-pxs2-gentil.dts +++ b/arch/arm/dts/uniphier-pxs2-gentil.dts @@ -46,6 +46,7 @@ eeprom@54 { compatible = "st,24c64", "i2c-eeprom"; reg = <0x54>; + pagesize = <32>; u-boot,i2c-offset-len = <2>; }; }; diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi index 904320c124..b0f6f94ce7 100644 --- a/arch/arm/dts/uniphier-pxs2.dtsi +++ b/arch/arm/dts/uniphier-pxs2.dtsi @@ -112,12 +112,6 @@ compatible = "fixed-clock"; clock-frequency = <50000000>; }; - - i2c_clk: i2c_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <50000000>; - }; }; soc { @@ -389,7 +383,7 @@ interrupts = <0 41 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c0>; - clocks = <&i2c_clk>; + clocks = <&peri_clk 4>; clock-frequency = <100000>; }; @@ -402,7 +396,7 @@ interrupts = <0 42 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; - clocks = <&i2c_clk>; + clocks = <&peri_clk 5>; clock-frequency = <100000>; }; @@ -415,7 +409,7 @@ interrupts = <0 43 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; - clocks = <&i2c_clk>; + clocks = <&peri_clk 6>; clock-frequency = <100000>; }; @@ -428,7 +422,7 @@ interrupts = <0 44 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3>; - clocks = <&i2c_clk>; + clocks = <&peri_clk 7>; clock-frequency = <100000>; }; @@ -439,7 +433,7 @@ #address-cells = <1>; #size-cells = <0>; interrupts = <0 45 4>; - clocks = <&i2c_clk>; + clocks = <&peri_clk 8>; clock-frequency = <400000>; }; @@ -450,7 +444,7 @@ #address-cells = <1>; #size-cells = <0>; interrupts = <0 25 4>; - clocks = <&i2c_clk>; + clocks = <&peri_clk 9>; clock-frequency = <400000>; }; @@ -461,7 +455,7 @@ #address-cells = <1>; #size-cells = <0>; interrupts = <0 26 4>; - clocks = <&i2c_clk>; + clocks = <&peri_clk 10>; clock-frequency = <400000>; }; @@ -590,7 +584,7 @@ sysctrl@61840000 { compatible = "socionext,uniphier-pxs2-sysctrl", "simple-mfd", "syscon"; - reg = <0x61840000 0x4000>; + reg = <0x61840000 0x10000>; sys_clk: clock { compatible = "socionext,uniphier-pxs2-clock"; diff --git a/arch/arm/dts/uniphier-ref-daughter.dtsi b/arch/arm/dts/uniphier-ref-daughter.dtsi index 6d25104281..9365b8fc48 100644 --- a/arch/arm/dts/uniphier-ref-daughter.dtsi +++ b/arch/arm/dts/uniphier-ref-daughter.dtsi @@ -1,7 +1,8 @@ /* * Device Tree Source for UniPhier Reference Daughter Board * - * Copyright (C) 2014-2015 Masahiro Yamada + * Copyright (C) 2015-2017 Socionext Inc. + * Author: Masahiro Yamada * * SPDX-License-Identifier: GPL-2.0+ X11 */ @@ -10,6 +11,7 @@ eeprom@50 { compatible = "microchip,24lc128", "i2c-eeprom"; reg = <0x50>; + pagesize = <64>; u-boot,i2c-offset-len = <2>; }; }; diff --git a/arch/arm/dts/uniphier-sld3.dtsi b/arch/arm/dts/uniphier-sld3.dtsi index 757892063a..9e458d3fce 100644 --- a/arch/arm/dts/uniphier-sld3.dtsi +++ b/arch/arm/dts/uniphier-sld3.dtsi @@ -101,6 +101,7 @@ interrupts = <0 33 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart0>; + clocks = <&sys_clk 0>; clock-frequency = <36864000>; }; @@ -111,6 +112,7 @@ interrupts = <0 35 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; + clocks = <&sys_clk 0>; clock-frequency = <36864000>; }; @@ -121,6 +123,7 @@ interrupts = <0 37 4>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; + clocks = <&sys_clk 0>; clock-frequency = <36864000>; }; @@ -307,7 +310,7 @@ }; mioctrl@59810000 { - compatible = "socionext,uniphier-mioctrl", + compatible = "socionext,uniphier-sld3-mioctrl", "simple-mfd", "syscon"; reg = <0x59810000 0x800>; u-boot,dm-pre-reloc; @@ -427,7 +430,7 @@ sysctrl@f1840000 { compatible = "socionext,uniphier-sld3-sysctrl", "simple-mfd", "syscon"; - reg = <0xf1840000 0x4000>; + reg = <0xf1840000 0x10000>; sys_clk: clock { compatible = "socionext,uniphier-sld3-clock";