From: Stefan Roese <sr@denx.de>
Date: Sat, 28 Jun 2008 12:56:17 +0000 (+0200)
Subject: ppc4xx: Fix 460EX errata with CPU lockup upon high AHB traffic
X-Git-Tag: v1.3.4-rc1~91^2
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=745d8a0d3cea82e6d1753e14afb4588c34761b15;p=u-boot

ppc4xx: Fix 460EX errata with CPU lockup upon high AHB traffic

This patch implements a fix provided by AMCC so that the lockup upon
simultanious traffic on AHB USB OTG, USB 2.0 and SATA doesn't occur
anymore:

Set SDR0_AHB_CFG[A2P_INCR4] (bit 24) and clear SDR0_AHB_CFG[A2P_PROT2]
(bit 25) for a new 460EX errata regarding concurrent use of AHB USB OTG,
USB 2.0 host and SATA.

This errata is not officially available yet. I'll update the comment
to add the errata number later.

Signed-off-by: Stefan Roese <sr@denx.de>
---

diff --git a/cpu/ppc4xx/cpu_init.c b/cpu/ppc4xx/cpu_init.c
index 1e9423a89b..ac64279051 100644
--- a/cpu/ppc4xx/cpu_init.c
+++ b/cpu/ppc4xx/cpu_init.c
@@ -138,8 +138,8 @@ void reconfigure_pll(u32 new_cpu_freq)
 void
 cpu_init_f (void)
 {
-#if defined(CONFIG_WATCHDOG)
-	unsigned long val;
+#if defined(CONFIG_WATCHDOG) || defined(CONFIG_460EX)
+	u32 val;
 #endif
 	reconfigure_pll(CFG_PLL_RECONFIG);
 
@@ -272,6 +272,22 @@ cpu_init_f (void)
 
 	reset_4xx_watchdog();
 #endif /* CONFIG_WATCHDOG */
+
+#if defined(CONFIG_460EX)
+	/*
+	 * Set SDR0_AHB_CFG[A2P_INCR4] (bit 24) and
+	 * clear SDR0_AHB_CFG[A2P_PROT2] (bit 25) for a new 460EX errata
+	 * regarding concurrent use of AHB USB OTG, USB 2.0 host and SATA
+	 */
+	mfsdr(SDR0_AHB_CFG, val);
+	val |= 0x80;
+	val &= ~0x40;
+	mtsdr(SDR0_AHB_CFG, val);
+	mfsdr(SDR0_USB2HOST_CFG, val);
+	val &= ~0xf00;
+	val |= 0x400;
+	mtsdr(SDR0_USB2HOST_CFG, val);
+#endif /* CONFIG_460EX */
 }
 
 /*
diff --git a/include/ppc440.h b/include/ppc440.h
index 62f1680441..c581f1b468 100644
--- a/include/ppc440.h
+++ b/include/ppc440.h
@@ -2471,6 +2471,8 @@
 
 #define AHB_TOP			0xA4
 #define AHB_BOT			0xA5
+#define SDR0_AHB_CFG		0x370
+#define SDR0_USB2HOST_CFG	0x371
 #endif /* CONFIG_460EX || CONFIG_460GT */
 
 #define SDR0_SDCS_SDD			(0x80000000 >> 31)