From: Meng Dongyang <daniel.meng@rock-chips.com>
Date: Wed, 17 May 2017 10:25:28 +0000 (+0800)
Subject: rockchip: dts: rk3328: support and enable xhci
X-Git-Tag: v2017.07-rc2~80^2~42
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=75ff918f83d1f8881beed640c3428994564c412c;p=u-boot

rockchip: dts: rk3328: support and enable xhci

Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
---

diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index 9920935b00..b807bc5228 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -51,3 +51,8 @@
 &usb_host0_ohci {
 	status = "okay";
 };
+
+&usb_host0_xhci {
+	rockchip,vbus-gpio = <&gpio0 0 GPIO_ACTIVE_HIGH>;
+	status = "okay";
+};
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index e1219c3dc2..f18cfc2627 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -471,6 +471,17 @@
 		status = "disabled";
 	};
 
+	usb_host0_xhci: usb@ff600000 {
+		compatible = "rockchip,rk3328-xhci";
+		reg = <0x0 0xff600000 0x0 0x100000>;
+		interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+		snps,dis-enblslpm-quirk;
+		snps,phyif-utmi-bits = <16>;
+		snps,dis-u2-freeclk-exists-quirk;
+		snps,dis-u2-susphy-quirk;
+		status = "disabled";
+	};
+
 	gic: interrupt-controller@ffb70000 {
 		compatible = "arm,gic-400";
 		#interrupt-cells = <3>;