From: Masahiro Yamada Date: Mon, 13 Feb 2017 16:24:26 +0000 (+0900) Subject: ARM: uniphier: rework spl_boot_device() and related code X-Git-Tag: v2017.03-rc3~8^2~8 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=784548efb2b76fdbfdb73f6a505a156f90bb1e55;p=u-boot ARM: uniphier: rework spl_boot_device() and related code The current implementation has ugly switch statements here and there, and duplicates similar code. Rework it using table lookups for SoC data and reduce code duplication. Signed-off-by: Masahiro Yamada --- diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile index 7baec738c7..124a1c6e98 100644 --- a/arch/arm/mach-uniphier/Makefile +++ b/arch/arm/mach-uniphier/Makefile @@ -25,7 +25,7 @@ obj-$(CONFIG_MMC) += mmc-first-dev.o endif obj-y += soc-info.o -obj-y += boot-mode/ +obj-y += boot-device/ obj-y += clk/ obj-y += dram/ diff --git a/arch/arm/mach-uniphier/board_late_init.c b/arch/arm/mach-uniphier/board_late_init.c index ece761fb94..92dd6105e4 100644 --- a/arch/arm/mach-uniphier/board_late_init.c +++ b/arch/arm/mach-uniphier/board_late_init.c @@ -13,7 +13,7 @@ #include #include <../drivers/mtd/nand/denali.h> -#include "boot-mode/boot-device.h" +#include "init.h" static void nand_denali_wp_disable(void) { @@ -62,7 +62,7 @@ int board_late_init(void) { puts("MODE: "); - switch (spl_boot_device_raw()) { + switch (uniphier_boot_device_raw()) { case BOOT_DEVICE_MMC1: printf("eMMC Boot\n"); setenv("bootmode", "emmcboot"); diff --git a/arch/arm/mach-uniphier/boot-device/Makefile b/arch/arm/mach-uniphier/boot-device/Makefile new file mode 100644 index 0000000000..a54d2acb10 --- /dev/null +++ b/arch/arm/mach-uniphier/boot-device/Makefile @@ -0,0 +1,19 @@ +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += boot-device.o + +obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += boot-device-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_LD4) += boot-device-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += boot-device-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += boot-device-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += boot-device-pro5.o +obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += boot-device-pxs2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += boot-device-pxs2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD11) += boot-device-ld11.o +obj-$(CONFIG_ARCH_UNIPHIER_LD20) += boot-device-ld11.o + +ifdef CONFIG_SPL_BUILD +obj-$(CONFIG_SPL_BOARD_LOAD_IMAGE) += spl_board.o +endif diff --git a/arch/arm/mach-uniphier/boot-device/boot-device-ld11.c b/arch/arm/mach-uniphier/boot-device/boot-device-ld11.c new file mode 100644 index 0000000000..f1a467c831 --- /dev/null +++ b/arch/arm/mach-uniphier/boot-device/boot-device-ld11.c @@ -0,0 +1,69 @@ +/* + * Copyright (C) 2016-2017 Socionext Inc. + * Author: Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +#include "boot-device.h" + +const struct uniphier_boot_device uniphier_ld11_boot_device_table[] = { + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 256KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 512KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI Addr 5)"}, + {BOOT_DEVICE_MMC1, "eMMC (Legacy, 4bit, 1.8V, Training Off)"}, + {BOOT_DEVICE_MMC1, "eMMC (Legacy, 4bit, 1.8V, Training On)"}, + {BOOT_DEVICE_MMC1, "eMMC (Legacy, 8bit, 1.8V, Training Off)"}, + {BOOT_DEVICE_MMC1, "eMMC (Legacy, 8bit, 1.8V, Training On)"}, + {BOOT_DEVICE_MMC1, "eMMC (High Speed SDR, 8bit, 1.8V, Training Off)"}, + {BOOT_DEVICE_MMC1, "eMMC (High Speed SDR, 8bit, 1.8V, Training On)"}, + {BOOT_DEVICE_MMC1, "eMMC (Legacy, 4bit, 1.8V, Training Off)"}, + {BOOT_DEVICE_NOR, "NOR (XECS1)"}, +}; + +const unsigned uniphier_ld11_boot_device_count = + ARRAY_SIZE(uniphier_ld11_boot_device_table); + +int uniphier_ld11_boot_device_is_usb(u32 pinmon) +{ + return !!(~pinmon & 0x00000080); +} + +int uniphier_ld20_boot_device_is_usb(u32 pinmon) +{ + return !!(~pinmon & 0x00000780); +} + +unsigned int uniphier_ld11_boot_device_fixup(unsigned int mode) +{ + if (mode == BOOT_DEVICE_MMC1 || mode == BOOT_DEVICE_USB) + mode = BOOT_DEVICE_BOARD; + + return mode; +} diff --git a/arch/arm/mach-uniphier/boot-device/boot-device-ld4.c b/arch/arm/mach-uniphier/boot-device/boot-device-ld4.c new file mode 100644 index 0000000000..b5d23210b1 --- /dev/null +++ b/arch/arm/mach-uniphier/boot-device/boot-device-ld4.c @@ -0,0 +1,52 @@ +/* + * Copyright (C) 2014 Panasonic Corporation + * Copyright (C) 2015-2017 Socionext Inc. + * Author: Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +#include "boot-device.h" + +const struct uniphier_boot_device uniphier_ld4_boot_device_table[] = { + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 24, EraseSize 1MB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 4, ECC 24, EraseSize 1MB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 256KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 512KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 24, EraseSize 512KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 24, ONFI, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 4, ECC 24, ONFI, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 24, ONFI, Addr 5)"}, + {BOOT_DEVICE_MMC1, "eMMC (3.3V)"}, + {BOOT_DEVICE_MMC1, "eMMC (1.8V)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NOR, "NOR (XECS0)"}, +}; + +const unsigned uniphier_ld4_boot_device_count = + ARRAY_SIZE(uniphier_ld4_boot_device_table); diff --git a/arch/arm/mach-uniphier/boot-device/boot-device-pro5.c b/arch/arm/mach-uniphier/boot-device/boot-device-pro5.c new file mode 100644 index 0000000000..47221ee61d --- /dev/null +++ b/arch/arm/mach-uniphier/boot-device/boot-device-pro5.c @@ -0,0 +1,51 @@ +/* + * Copyright (C) 2015-2017 Socionext Inc. + * Author: Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +#include "boot-device.h" + +const struct uniphier_boot_device uniphier_pro5_boot_device_table[] = { + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 256KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 512KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128MB, Addr 4)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512MB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 4)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_MMC1, "eMMC (1.8V)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128MB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"}, +}; + +const unsigned uniphier_pro5_boot_device_count = + ARRAY_SIZE(uniphier_pro5_boot_device_table); diff --git a/arch/arm/mach-uniphier/boot-device/boot-device-pxs2.c b/arch/arm/mach-uniphier/boot-device/boot-device-pxs2.c new file mode 100644 index 0000000000..20a9511549 --- /dev/null +++ b/arch/arm/mach-uniphier/boot-device/boot-device-pxs2.c @@ -0,0 +1,64 @@ +/* + * Copyright (C) 2015-2017 Socionext Inc. + * Author: Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +#include "boot-device.h" + +const struct uniphier_boot_device uniphier_pxs2_boot_device_table[] = { + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 256KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 512KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 4)"}, + {BOOT_DEVICE_MMC1, "eMMC (1.8V)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 5)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 4)"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 4)"}, + {BOOT_DEVICE_SPI, "SPI (3Byte CS0)"}, + {BOOT_DEVICE_SPI, "SPI (4Byte CS0)"}, + {BOOT_DEVICE_SPI, "SPI (3Byte CS1)"}, + {BOOT_DEVICE_SPI, "SPI (4Byte CS1)"}, + {BOOT_DEVICE_SPI, "SPI (4Byte CS0)"}, + {BOOT_DEVICE_SPI, "SPI (3Byte CS0)"}, + {BOOT_DEVICE_NONE, "Reserved"}, +}; + +const unsigned uniphier_pxs2_boot_device_count = + ARRAY_SIZE(uniphier_pxs2_boot_device_table); + +int uniphier_pxs2_boot_device_is_usb(u32 pinmon) +{ + return !!(pinmon & 0x00000040); +} + +unsigned int uniphier_pxs2_boot_device_fixup(unsigned int mode) +{ + if (mode == BOOT_DEVICE_USB) + return BOOT_DEVICE_NOR; + + return mode; +} diff --git a/arch/arm/mach-uniphier/boot-device/boot-device-sld3.c b/arch/arm/mach-uniphier/boot-device/boot-device-sld3.c new file mode 100644 index 0000000000..2b36494f73 --- /dev/null +++ b/arch/arm/mach-uniphier/boot-device/boot-device-sld3.c @@ -0,0 +1,84 @@ +/* + * Copyright (C) 2014 Panasonic Corporation + * Copyright (C) 2015-2017 Socionext Inc. + * Author: Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +#include "boot-device.h" + +const struct uniphier_boot_device uniphier_sld3_boot_device_table[] = { + {BOOT_DEVICE_NOR, "NOR (XECS0)"}, + {BOOT_DEVICE_NONE, "External Master"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_MMC1, "eMMC (3.3V, Boot Oparation)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_MMC1, "eMMC (1.8V, Boot Oparation)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_MMC1, "eMMC (3.3V, Normal)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_MMC1, "eMMC (1.8V, Normal)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 256KB, Addr 5)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 512KB, Addr 5)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 4, ECC 24, EraseSize 1MB, Addr 5)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 24, EraseSize 1MB, Addr 5)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 5)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 5)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 4, ECC 24, ONFI, Addr 5)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 24, ONFI, Addr 5)"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NONE, "Reserved"}, +}; + +const unsigned uniphier_sld3_boot_device_count = + ARRAY_SIZE(uniphier_sld3_boot_device_table); diff --git a/arch/arm/mach-uniphier/boot-device/boot-device.c b/arch/arm/mach-uniphier/boot-device/boot-device.c new file mode 100644 index 0000000000..5ec0b5b87c --- /dev/null +++ b/arch/arm/mach-uniphier/boot-device/boot-device.c @@ -0,0 +1,206 @@ +/* + * Copyright (C) 2015-2017 Socionext Inc. + * Author: Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include + +#include "../init.h" +#include "../sbc/sbc-regs.h" +#include "../sg-regs.h" +#include "../soc-info.h" +#include "boot-device.h" + +struct uniphier_boot_device_info { + unsigned int soc_id; + unsigned int boot_device_sel_shift; + const struct uniphier_boot_device *boot_device_table; + const unsigned int *boot_device_count; + int (*boot_device_is_usb)(u32 pinmon); + unsigned int (*boot_device_fixup)(unsigned int mode); +}; + +static const struct uniphier_boot_device_info uniphier_boot_device_info[] = { +#if defined(CONFIG_ARCH_UNIPHIER_SLD3) + { + .soc_id = UNIPHIER_SLD3_ID, + .boot_device_sel_shift = 0, + .boot_device_table = uniphier_sld3_boot_device_table, + .boot_device_count = &uniphier_sld3_boot_device_count, + }, +#endif +#if defined(CONFIG_ARCH_UNIPHIER_LD4) + { + .soc_id = UNIPHIER_LD4_ID, + .boot_device_sel_shift = 1, + .boot_device_table = uniphier_ld4_boot_device_table, + .boot_device_count = &uniphier_ld4_boot_device_count, + }, +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PRO4) + { + .soc_id = UNIPHIER_PRO4_ID, + .boot_device_sel_shift = 1, + .boot_device_table = uniphier_ld4_boot_device_table, + .boot_device_count = &uniphier_ld4_boot_device_count, + }, +#endif +#if defined(CONFIG_ARCH_UNIPHIER_SLD8) + { + .soc_id = UNIPHIER_SLD8_ID, + .boot_device_sel_shift = 1, + .boot_device_table = uniphier_ld4_boot_device_table, + .boot_device_count = &uniphier_ld4_boot_device_count, + }, +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PRO5) + { + .soc_id = UNIPHIER_PRO5_ID, + .boot_device_sel_shift = 1, + .boot_device_table = uniphier_pro5_boot_device_table, + .boot_device_count = &uniphier_pro5_boot_device_count, + }, +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PXS2) + { + .soc_id = UNIPHIER_PXS2_ID, + .boot_device_sel_shift = 1, + .boot_device_table = uniphier_pxs2_boot_device_table, + .boot_device_count = &uniphier_pxs2_boot_device_count, + .boot_device_is_usb = uniphier_pxs2_boot_device_is_usb, + .boot_device_fixup = uniphier_pxs2_boot_device_fixup, + }, +#endif +#if defined(CONFIG_ARCH_UNIPHIER_LD6B) + { + .soc_id = UNIPHIER_LD6B_ID, + .boot_device_sel_shift = 1, + .boot_device_table = uniphier_pxs2_boot_device_table, + .boot_device_count = &uniphier_pxs2_boot_device_count, + .boot_device_is_usb = uniphier_pxs2_boot_device_is_usb, + .boot_device_fixup = uniphier_pxs2_boot_device_fixup, + }, +#endif +#if defined(CONFIG_ARCH_UNIPHIER_LD11) + { + .soc_id = UNIPHIER_LD11_ID, + .boot_device_sel_shift = 1, + .boot_device_table = uniphier_ld11_boot_device_table, + .boot_device_count = &uniphier_ld11_boot_device_count, + .boot_device_is_usb = uniphier_ld11_boot_device_is_usb, + .boot_device_fixup = uniphier_ld11_boot_device_fixup, + }, +#endif +#if defined(CONFIG_ARCH_UNIPHIER_LD20) + { + .soc_id = UNIPHIER_LD20_ID, + .boot_device_sel_shift = 1, + .boot_device_table = uniphier_ld11_boot_device_table, + .boot_device_count = &uniphier_ld11_boot_device_count, + .boot_device_is_usb = uniphier_ld20_boot_device_is_usb, + .boot_device_fixup = uniphier_ld11_boot_device_fixup, + }, +#endif +}; +UNIPHIER_DEFINE_SOCDATA_FUNC(uniphier_get_boot_device_info, + uniphier_boot_device_info) + +static unsigned int __uniphier_boot_device_raw( + const struct uniphier_boot_device_info *info) +{ + u32 pinmon; + unsigned int boot_sel; + + if (boot_is_swapped()) + return BOOT_DEVICE_NOR; + + pinmon = readl(SG_PINMON0); + + if (info->boot_device_is_usb && info->boot_device_is_usb(pinmon)) + return BOOT_DEVICE_USB; + + boot_sel = pinmon >> info->boot_device_sel_shift; + + BUG_ON(!is_power_of_2(*info->boot_device_count)); + boot_sel &= *info->boot_device_count - 1; + + return info->boot_device_table[boot_sel].boot_device; +} + +unsigned int uniphier_boot_device_raw(void) +{ + const struct uniphier_boot_device_info *info; + + info = uniphier_get_boot_device_info(); + if (!info) { + pr_err("unsupported SoC\n"); + return BOOT_DEVICE_NONE; + } + + return __uniphier_boot_device_raw(info); +} + +u32 spl_boot_device(void) +{ + const struct uniphier_boot_device_info *info; + u32 raw_mode; + + info = uniphier_get_boot_device_info(); + if (!info) { + pr_err("unsupported SoC\n"); + return BOOT_DEVICE_NONE; + } + + raw_mode = __uniphier_boot_device_raw(info); + + return info->boot_device_fixup ? + info->boot_device_fixup(raw_mode) : raw_mode; +} + +#ifndef CONFIG_SPL_BUILD + +static int do_pinmon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + const struct uniphier_boot_device_info *info; + u32 pinmon; + unsigned int boot_device_count, boot_sel; + int i; + + info = uniphier_get_boot_device_info(); + if (!info) { + pr_err("unsupported SoC\n"); + return CMD_RET_FAILURE; + } + + printf("Boot Swap: %s\n\n", boot_is_swapped() ? "ON" : "OFF"); + + pinmon = readl(SG_PINMON0); + + if (info->boot_device_is_usb) + printf("USB Boot: %s\n\n", + info->boot_device_is_usb(pinmon) ? "ON" : "OFF"); + + boot_device_count = *info->boot_device_count; + + boot_sel = pinmon >> info->boot_device_sel_shift; + boot_sel &= boot_device_count - 1; + + printf("Boot Mode Sel:\n"); + for (i = 0; i < boot_device_count; i++) + printf(" %c %02x %s\n", i == boot_sel ? '*' : ' ', i, + info->boot_device_table[i].desc); + + return CMD_RET_SUCCESS; +} + +U_BOOT_CMD( + pinmon, 1, 1, do_pinmon, + "pin monitor", + "" +); + +#endif /* !CONFIG_SPL_BUILD */ diff --git a/arch/arm/mach-uniphier/boot-device/boot-device.h b/arch/arm/mach-uniphier/boot-device/boot-device.h new file mode 100644 index 0000000000..f3fb2f32a8 --- /dev/null +++ b/arch/arm/mach-uniphier/boot-device/boot-device.h @@ -0,0 +1,35 @@ +/* + * Copyright (C) 2017 Socionext Inc. + * Author: Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _UNIPHIER_BOOT_DEVICE_H_ +#define _UNIPHIER_BOOT_DEVICE_H_ + +struct uniphier_boot_device { + unsigned int boot_device; + const char *desc; +}; + +extern const struct uniphier_boot_device uniphier_sld3_boot_device_table[]; +extern const struct uniphier_boot_device uniphier_ld4_boot_device_table[]; +extern const struct uniphier_boot_device uniphier_pro5_boot_device_table[]; +extern const struct uniphier_boot_device uniphier_pxs2_boot_device_table[]; +extern const struct uniphier_boot_device uniphier_ld11_boot_device_table[]; + +extern const unsigned int uniphier_sld3_boot_device_count; +extern const unsigned int uniphier_ld4_boot_device_count; +extern const unsigned int uniphier_pro5_boot_device_count; +extern const unsigned int uniphier_pxs2_boot_device_count; +extern const unsigned int uniphier_ld11_boot_device_count; + +int uniphier_pxs2_boot_device_is_usb(u32 pinmon); +int uniphier_ld11_boot_device_is_usb(u32 pinmon); +int uniphier_ld20_boot_device_is_usb(u32 pinmon); + +unsigned int uniphier_pxs2_boot_device_fixup(unsigned int mode); +unsigned int uniphier_ld11_boot_device_fixup(unsigned int mode); + +#endif /* _UNIPHIER_BOOT_DEVICE_H_ */ diff --git a/arch/arm/mach-uniphier/boot-device/spl_board.c b/arch/arm/mach-uniphier/boot-device/spl_board.c new file mode 100644 index 0000000000..0aac9241c3 --- /dev/null +++ b/arch/arm/mach-uniphier/boot-device/spl_board.c @@ -0,0 +1,125 @@ +/* + * Copyright (C) 2016 Socionext Inc. + * Author: Masahiro Yamada + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +#include "../soc-info.h" + +struct uniphier_romfunc_table { + void *mmc_send_cmd; + void *mmc_card_blockaddr; + void *mmc_switch_part; + void *mmc_load_image; +}; + +static const struct uniphier_romfunc_table uniphier_ld11_romfunc_table = { + .mmc_send_cmd = (void *)0x20d8, + .mmc_card_blockaddr = (void *)0x1b68, + .mmc_switch_part = (void *)0x1c38, + .mmc_load_image = (void *)0x2e48, +}; + +static const struct uniphier_romfunc_table uniphier_ld20_romfunc_table = { + .mmc_send_cmd = (void *)0x2130, + .mmc_card_blockaddr = (void *)0x1ba0, + .mmc_switch_part = (void *)0x1c70, + .mmc_load_image = (void *)0x2ef0, +}; + +int uniphier_rom_get_mmc_funcptr(int (**send_cmd)(u32, u32), + int (**card_blockaddr)(u32), + int (**switch_part)(int), + int (**load_image)(u32, uintptr_t, u32)) +{ + const struct uniphier_romfunc_table *table; + + switch (uniphier_get_soc_id()) { + case UNIPHIER_LD11_ID: + table = &uniphier_ld11_romfunc_table; + break; + case UNIPHIER_LD20_ID: + table = &uniphier_ld20_romfunc_table; + break; + default: + printf("unsupported SoC\n"); + return -EINVAL; + } + + *send_cmd = table->mmc_send_cmd; + *card_blockaddr = table->mmc_card_blockaddr; + *switch_part = table->mmc_switch_part; + *load_image = table->mmc_load_image; + + return 0; +} + +static int spl_board_load_image(struct spl_image_info *spl_image, + struct spl_boot_device *bootdev) +{ + int (*send_cmd)(u32 cmd, u32 arg); + int (*card_blockaddr)(u32 rca); + int (*switch_part)(int part); + int (*load_image)(u32 dev_addr, uintptr_t load_addr, u32 block_cnt); + u32 dev_addr = CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR; + const u32 rca = 0x1000; /* RCA assigned by Boot ROM */ + int ret; + + ret = uniphier_rom_get_mmc_funcptr(&send_cmd, &card_blockaddr, + &switch_part, &load_image); + if (ret) + return ret; + + /* + * deselect card before SEND_CSD command. + * Do not check the return code. It fails, but it is OK. + */ + (*send_cmd)(0x071a0000, 0); /* CMD7 (arg=0) */ + + /* reset CMD Line */ + writeb(0x6, 0x5a00022f); + while (readb(0x5a00022f)) + cpu_relax(); + + ret = (*card_blockaddr)(rca); + if (ret) { + debug("card is block addressing\n"); + } else { + debug("card is byte addressing\n"); + dev_addr *= 512; + } + + ret = (*send_cmd)(0x071a0000, rca << 16); /* CMD7: select card again */ + if (ret) + printf("failed to select card\n"); + + ret = (*switch_part)(1); /* Switch to Boot Partition 1 */ + if (ret) + printf("failed to switch partition\n"); + + ret = (*load_image)(dev_addr, CONFIG_SYS_TEXT_BASE, 1); + if (ret) { + printf("failed to load image\n"); + return ret; + } + + ret = spl_parse_image_header(spl_image, (void *)CONFIG_SYS_TEXT_BASE); + if (ret) + return ret; + + ret = (*load_image)(dev_addr, spl_image->load_addr, + spl_image->size / 512); + if (ret) { + printf("failed to load image\n"); + return ret; + } + + return 0; +} +SPL_LOAD_IMAGE_METHOD("eMMC", 0, BOOT_DEVICE_BOARD, spl_board_load_image); diff --git a/arch/arm/mach-uniphier/boot-mode/Makefile b/arch/arm/mach-uniphier/boot-mode/Makefile deleted file mode 100644 index a8980210b1..0000000000 --- a/arch/arm/mach-uniphier/boot-mode/Makefile +++ /dev/null @@ -1,21 +0,0 @@ -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y += boot-mode.o - -obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += boot-mode-sld3.o -obj-$(CONFIG_ARCH_UNIPHIER_LD4) += boot-mode-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += boot-mode-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += boot-mode-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += boot-mode-pro5.o -obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += boot-mode-pxs2.o -obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += boot-mode-pxs2.o -obj-$(CONFIG_ARCH_UNIPHIER_LD11) += boot-mode-ld20.o -obj-$(CONFIG_ARCH_UNIPHIER_LD20) += boot-mode-ld20.o - -ifdef CONFIG_SPL_BUILD -obj-$(CONFIG_SPL_BOARD_LOAD_IMAGE) += spl_board.o -else -obj-$(CONFIG_CMD_PINMON) += cmd_pinmon.o -endif diff --git a/arch/arm/mach-uniphier/boot-mode/boot-device.h b/arch/arm/mach-uniphier/boot-mode/boot-device.h deleted file mode 100644 index bd44d73416..0000000000 --- a/arch/arm/mach-uniphier/boot-mode/boot-device.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * Copyright (C) 2011-2015 Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _ASM_BOOT_DEVICE_H_ -#define _ASM_BOOT_DEVICE_H_ - -struct boot_device_info { - u32 type; - char *info; -}; - -u32 uniphier_sld3_boot_device(void); -u32 uniphier_ld4_boot_device(void); -u32 uniphier_pro5_boot_device(void); -u32 uniphier_pxs2_boot_device(void); -u32 uniphier_ld20_boot_device(void); - -void uniphier_sld3_boot_mode_show(void); -void uniphier_ld4_boot_mode_show(void); -void uniphier_pro5_boot_mode_show(void); -void uniphier_pxs2_boot_mode_show(void); -void uniphier_ld20_boot_mode_show(void); - -u32 spl_boot_device_raw(void); - -#endif /* _ASM_BOOT_DEVICE_H_ */ diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c deleted file mode 100644 index 2992fd757f..0000000000 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c +++ /dev/null @@ -1,95 +0,0 @@ -/* - * Copyright (C) 2016-2017 Socionext Inc. - * Author: Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include - -#include "../sg-regs.h" -#include "../soc-info.h" -#include "boot-device.h" - -static struct boot_device_info boot_device_table[] = { - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 4)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 4)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 4)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 256KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 512KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 4)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 4)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI Addr 4)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI Addr 4)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI Addr 5)"}, - {BOOT_DEVICE_MMC1, "eMMC (Legacy, 4bit, 1.8V, Training Off)"}, - {BOOT_DEVICE_MMC1, "eMMC (Legacy, 4bit, 1.8V, Training On)"}, - {BOOT_DEVICE_MMC1, "eMMC (Legacy, 8bit, 1.8V, Training Off)"}, - {BOOT_DEVICE_MMC1, "eMMC (Legacy, 8bit, 1.8V, Training On)"}, - {BOOT_DEVICE_MMC1, "eMMC (High Speed SDR, 8bit, 1.8V, Training Off)"}, - {BOOT_DEVICE_MMC1, "eMMC (High Speed SDR, 8bit, 1.8V, Training On)"}, - {BOOT_DEVICE_MMC1, "eMMC (Legacy, 4bit, 1.8V, Training Off)"}, - {BOOT_DEVICE_NOR, "NOR (XECS1)"}, -}; - -static int get_boot_mode_sel(void) -{ - return (readl(SG_PINMON0) >> 1) & 0x1f; -} - -u32 uniphier_ld20_boot_device(void) -{ - int boot_mode; - u32 usb_boot_mask; - - switch (uniphier_get_soc_id()) { -#if defined(CONFIG_ARCH_UNIPHIER_LD11) - case UNIPHIER_LD11_ID: - usb_boot_mask = 0x00000080; - break; -#endif -#if defined(CONFIG_ARCH_UNIPHIER_LD20) - case UNIPHIER_LD20_ID: - usb_boot_mask = 0x00000780; - break; -#endif - default: - BUG(); - } - - if (~readl(SG_PINMON0) & usb_boot_mask) - return BOOT_DEVICE_USB; - - boot_mode = get_boot_mode_sel(); - - return boot_device_table[boot_mode].type; -} - -void uniphier_ld20_boot_mode_show(void) -{ - int mode_sel, i; - - mode_sel = get_boot_mode_sel(); - - puts("Boot Mode Pin:\n"); - - for (i = 0; i < ARRAY_SIZE(boot_device_table); i++) - printf(" %c %02x %s\n", i == mode_sel ? '*' : ' ', i, - boot_device_table[i].info); -} diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-ld4.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-ld4.c deleted file mode 100644 index b066ed9c4b..0000000000 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode-ld4.c +++ /dev/null @@ -1,74 +0,0 @@ -/* - * Copyright (C) 2014-2015 Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include - -#include "../sg-regs.h" -#include "boot-device.h" - -struct boot_device_info boot_device_table[] = { - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 24, EraseSize 1MB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 4, ECC 24, EraseSize 1MB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 256KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 512KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 24, EraseSize 512KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 4)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 24, ONFI, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 4, ECC 24, ONFI, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 24, ONFI, Addr 5)"}, - {BOOT_DEVICE_MMC1, "eMMC (3.3V)"}, - {BOOT_DEVICE_MMC1, "eMMC (1.8V)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NOR, "NOR (XECS0)"}, -}; - -static int get_boot_mode_sel(void) -{ - return (readl(SG_PINMON0) >> 1) & 0x1f; -} - -u32 uniphier_ld4_boot_device(void) -{ - int boot_mode; - - boot_mode = get_boot_mode_sel(); - - return boot_device_table[boot_mode].type; -} - -void uniphier_ld4_boot_mode_show(void) -{ - int mode_sel, i; - - mode_sel = get_boot_mode_sel(); - - puts("Boot Mode Pin:\n"); - - for (i = 0; i < ARRAY_SIZE(boot_device_table); i++) - printf(" %c %02x %s\n", i == mode_sel ? '*' : ' ', i, - boot_device_table[i].info); -} diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-pro5.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-pro5.c deleted file mode 100644 index 450c43bba5..0000000000 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode-pro5.c +++ /dev/null @@ -1,75 +0,0 @@ -/* - * Copyright (C) 2015 Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include - -#include "../sg-regs.h" -#include "boot-device.h" - -static struct boot_device_info boot_device_table[] = { - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 256KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 512KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 4)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128MB, Addr 4)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512MB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 4)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 4)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 4)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 4)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 4)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_MMC1, "eMMC (1.8V)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128MB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"}, - { /* sentinel */ } -}; - -static int get_boot_mode_sel(void) -{ - return (readl(SG_PINMON0) >> 1) & 0x1f; -} - -u32 uniphier_pro5_boot_device(void) -{ - int boot_mode; - - boot_mode = get_boot_mode_sel(); - - return boot_device_table[boot_mode].type; -} - -void uniphier_pro5_boot_mode_show(void) -{ - int mode_sel, i; - - mode_sel = get_boot_mode_sel(); - - puts("Boot Mode Pin:\n"); - - for (i = 0; i < ARRAY_SIZE(boot_device_table); i++) - printf(" %c %02x %s\n", i == mode_sel ? '*' : ' ', i, - boot_device_table[i].info); -} diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-pxs2.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-pxs2.c deleted file mode 100644 index 20ff7731d5..0000000000 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode-pxs2.c +++ /dev/null @@ -1,77 +0,0 @@ -/* - * Copyright (C) 2015 Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include - -#include "../sg-regs.h" -#include "boot-device.h" - -static struct boot_device_info boot_device_table[] = { - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 4)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 4)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 256KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 512KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 4)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 4)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 4)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 4)"}, - {BOOT_DEVICE_MMC1, "eMMC (1.8V)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 5)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 4)"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 4)"}, - {BOOT_DEVICE_SPI, "SPI (3Byte CS0)"}, - {BOOT_DEVICE_SPI, "SPI (4Byte CS0)"}, - {BOOT_DEVICE_SPI, "SPI (3Byte CS1)"}, - {BOOT_DEVICE_SPI, "SPI (4Byte CS1)"}, - {BOOT_DEVICE_SPI, "SPI (4Byte CS0)"}, - {BOOT_DEVICE_SPI, "SPI (3Byte CS0)"}, - {BOOT_DEVICE_NONE, "Reserved"}, -}; - -static int get_boot_mode_sel(void) -{ - return (readl(SG_PINMON0) >> 1) & 0x1f; -} - -u32 uniphier_pxs2_boot_device(void) -{ - int boot_mode; - - if (readl(SG_PINMON0) & BIT(6)) - return BOOT_DEVICE_USB; - - boot_mode = get_boot_mode_sel(); - - return boot_device_table[boot_mode].type; -} - -void uniphier_pxs2_boot_mode_show(void) -{ - int mode_sel, i; - - mode_sel = get_boot_mode_sel(); - - puts("Boot Mode Pin:\n"); - - for (i = 0; i < ARRAY_SIZE(boot_device_table); i++) - printf(" %c %02x %s\n", i == mode_sel ? '*' : ' ', i, - boot_device_table[i].info); -} diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-sld3.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-sld3.c deleted file mode 100644 index ddf8259c2c..0000000000 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode-sld3.c +++ /dev/null @@ -1,106 +0,0 @@ -/* - * Copyright (C) 2014-2015 Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include - -#include "../sg-regs.h" -#include "boot-device.h" - -static struct boot_device_info boot_device_table[] = { - {BOOT_DEVICE_NOR, "NOR (XECS0)"}, - {BOOT_DEVICE_NONE, "External Master"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_MMC1, "eMMC (3.3V, Boot Oparation)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_MMC1, "eMMC (1.8V, Boot Oparation)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_MMC1, "eMMC (3.3V, Normal)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_MMC1, "eMMC (1.8V, Normal)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 128KB, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 256KB, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, EraseSize 512KB, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 128KB, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 256KB, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, EraseSize 512KB, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 4, ECC 24, EraseSize 1MB, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128KB, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 256KB, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 512KB, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 128KB, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 256KB, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, EraseSize 512KB, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 24, EraseSize 1MB, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 4, ECC 24, ONFI, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 24, ONFI, Addr 5)"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, -}; - -static int get_boot_mode_sel(void) -{ - return readl(SG_PINMON0) & 0x3f; -} - -u32 uniphier_sld3_boot_device(void) -{ - int boot_mode; - - boot_mode = get_boot_mode_sel(); - - return boot_device_table[boot_mode].type; -} - -void uniphier_sld3_boot_mode_show(void) -{ - int mode_sel, i; - - mode_sel = get_boot_mode_sel(); - - puts("Boot Mode Pin:\n"); - - for (i = 0; i < ARRAY_SIZE(boot_device_table); i++) - printf(" %c %02x %s\n", i == mode_sel ? '*' : ' ', i, - boot_device_table[i].info); -} diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode.c b/arch/arm/mach-uniphier/boot-mode/boot-mode.c deleted file mode 100644 index 4e1142bd9d..0000000000 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode.c +++ /dev/null @@ -1,78 +0,0 @@ -/* - * Copyright (C) 2015 Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include - -#include "../sbc/sbc-regs.h" -#include "../soc-info.h" -#include "boot-device.h" - -u32 spl_boot_device_raw(void) -{ - if (boot_is_swapped()) - return BOOT_DEVICE_NOR; - - switch (uniphier_get_soc_id()) { -#if defined(CONFIG_ARCH_UNIPHIER_SLD3) - case UNIPHIER_SLD3_ID: - return uniphier_sld3_boot_device(); -#endif -#if defined(CONFIG_ARCH_UNIPHIER_LD4) || defined(CONFIG_ARCH_UNIPHIER_PRO4) || \ - defined(CONFIG_ARCH_UNIPHIER_SLD8) - case UNIPHIER_LD4_ID: - case UNIPHIER_PRO4_ID: - case UNIPHIER_SLD8_ID: - return uniphier_ld4_boot_device(); -#endif -#if defined(CONFIG_ARCH_UNIPHIER_PRO5) - case UNIPHIER_PRO5_ID: - return uniphier_pro5_boot_device(); -#endif -#if defined(CONFIG_ARCH_UNIPHIER_PXS2) || defined(CONFIG_ARCH_UNIPHIER_LD6B) - case UNIPHIER_PXS2_ID: - case UNIPHIER_LD6B_ID: - return uniphier_pxs2_boot_device(); -#endif -#if defined(CONFIG_ARCH_UNIPHIER_LD11) || defined(CONFIG_ARCH_UNIPHIER_LD20) - case UNIPHIER_LD11_ID: - case UNIPHIER_LD20_ID: - return uniphier_ld20_boot_device(); -#endif - default: - return BOOT_DEVICE_NONE; - } -} - -u32 spl_boot_device(void) -{ - u32 mode; - - mode = spl_boot_device_raw(); - - switch (uniphier_get_soc_id()) { -#if defined(CONFIG_ARCH_UNIPHIER_PXS2) || defined(CONFIG_ARCH_UNIPHIER_LD6B) - case UNIPHIER_PXS2_ID: - case UNIPHIER_LD6B_ID: - if (mode == BOOT_DEVICE_USB) - mode = BOOT_DEVICE_NOR; - break; -#endif -#if defined(CONFIG_ARCH_UNIPHIER_LD11) || defined(CONFIG_ARCH_UNIPHIER_LD20) - case UNIPHIER_LD11_ID: - case UNIPHIER_LD20_ID: - if (mode == BOOT_DEVICE_MMC1 || mode == BOOT_DEVICE_USB) - mode = BOOT_DEVICE_BOARD; - break; -#endif - default: - break; - } - - return mode; -} diff --git a/arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c b/arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c deleted file mode 100644 index 670d4f6bff..0000000000 --- a/arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c +++ /dev/null @@ -1,59 +0,0 @@ -/* - * Copyright (C) 2014-2015 Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include - -#include "../sbc/sbc-regs.h" -#include "../soc-info.h" -#include "boot-device.h" - -static int do_pinmon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) -{ - printf("Boot Swap: %s\n\n", boot_is_swapped() ? "ON" : "OFF"); - - switch (uniphier_get_soc_id()) { -#if defined(CONFIG_ARCH_UNIPHIER_SLD3) - case UNIPHIER_SLD3_ID: - uniphier_sld3_boot_mode_show(); - break; -#endif -#if defined(CONFIG_ARCH_UNIPHIER_LD4) || defined(CONFIG_ARCH_UNIPHIER_PRO4) || \ - defined(CONFIG_ARCH_UNIPHIER_SLD8) - case UNIPHIER_LD4_ID: - case UNIPHIER_PRO4_ID: - case UNIPHIER_SLD8_ID: - uniphier_ld4_boot_mode_show(); - break; -#endif -#if defined(CONFIG_ARCH_UNIPHIER_PRO5) - case UNIPHIER_PRO5_ID: - uniphier_pro5_boot_mode_show(); - break; -#endif -#if defined(CONFIG_ARCH_UNIPHIER_PXS2) || defined(CONFIG_ARCH_UNIPHIER_LD6B) - case UNIPHIER_PXS2_ID: - case UNIPHIER_LD6B_ID: - uniphier_pxs2_boot_mode_show(); - break; -#endif -#if defined(CONFIG_ARCH_UNIPHIER_LD11) || defined(CONFIG_ARCH_UNIPHIER_LD20) - case UNIPHIER_LD11_ID: - case UNIPHIER_LD20_ID: - uniphier_ld20_boot_mode_show(); - break; -#endif - default: - break; - } - - return 0; -} - -U_BOOT_CMD( - pinmon, 1, 1, do_pinmon, - "pin monitor", - "" -); diff --git a/arch/arm/mach-uniphier/boot-mode/spl_board.c b/arch/arm/mach-uniphier/boot-mode/spl_board.c deleted file mode 100644 index 0aac9241c3..0000000000 --- a/arch/arm/mach-uniphier/boot-mode/spl_board.c +++ /dev/null @@ -1,125 +0,0 @@ -/* - * Copyright (C) 2016 Socionext Inc. - * Author: Masahiro Yamada - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include -#include -#include - -#include "../soc-info.h" - -struct uniphier_romfunc_table { - void *mmc_send_cmd; - void *mmc_card_blockaddr; - void *mmc_switch_part; - void *mmc_load_image; -}; - -static const struct uniphier_romfunc_table uniphier_ld11_romfunc_table = { - .mmc_send_cmd = (void *)0x20d8, - .mmc_card_blockaddr = (void *)0x1b68, - .mmc_switch_part = (void *)0x1c38, - .mmc_load_image = (void *)0x2e48, -}; - -static const struct uniphier_romfunc_table uniphier_ld20_romfunc_table = { - .mmc_send_cmd = (void *)0x2130, - .mmc_card_blockaddr = (void *)0x1ba0, - .mmc_switch_part = (void *)0x1c70, - .mmc_load_image = (void *)0x2ef0, -}; - -int uniphier_rom_get_mmc_funcptr(int (**send_cmd)(u32, u32), - int (**card_blockaddr)(u32), - int (**switch_part)(int), - int (**load_image)(u32, uintptr_t, u32)) -{ - const struct uniphier_romfunc_table *table; - - switch (uniphier_get_soc_id()) { - case UNIPHIER_LD11_ID: - table = &uniphier_ld11_romfunc_table; - break; - case UNIPHIER_LD20_ID: - table = &uniphier_ld20_romfunc_table; - break; - default: - printf("unsupported SoC\n"); - return -EINVAL; - } - - *send_cmd = table->mmc_send_cmd; - *card_blockaddr = table->mmc_card_blockaddr; - *switch_part = table->mmc_switch_part; - *load_image = table->mmc_load_image; - - return 0; -} - -static int spl_board_load_image(struct spl_image_info *spl_image, - struct spl_boot_device *bootdev) -{ - int (*send_cmd)(u32 cmd, u32 arg); - int (*card_blockaddr)(u32 rca); - int (*switch_part)(int part); - int (*load_image)(u32 dev_addr, uintptr_t load_addr, u32 block_cnt); - u32 dev_addr = CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR; - const u32 rca = 0x1000; /* RCA assigned by Boot ROM */ - int ret; - - ret = uniphier_rom_get_mmc_funcptr(&send_cmd, &card_blockaddr, - &switch_part, &load_image); - if (ret) - return ret; - - /* - * deselect card before SEND_CSD command. - * Do not check the return code. It fails, but it is OK. - */ - (*send_cmd)(0x071a0000, 0); /* CMD7 (arg=0) */ - - /* reset CMD Line */ - writeb(0x6, 0x5a00022f); - while (readb(0x5a00022f)) - cpu_relax(); - - ret = (*card_blockaddr)(rca); - if (ret) { - debug("card is block addressing\n"); - } else { - debug("card is byte addressing\n"); - dev_addr *= 512; - } - - ret = (*send_cmd)(0x071a0000, rca << 16); /* CMD7: select card again */ - if (ret) - printf("failed to select card\n"); - - ret = (*switch_part)(1); /* Switch to Boot Partition 1 */ - if (ret) - printf("failed to switch partition\n"); - - ret = (*load_image)(dev_addr, CONFIG_SYS_TEXT_BASE, 1); - if (ret) { - printf("failed to load image\n"); - return ret; - } - - ret = spl_parse_image_header(spl_image, (void *)CONFIG_SYS_TEXT_BASE); - if (ret) - return ret; - - ret = (*load_image)(dev_addr, spl_image->load_addr, - spl_image->size / 512); - if (ret) { - printf("failed to load image\n"); - return ret; - } - - return 0; -} -SPL_LOAD_IMAGE_METHOD("eMMC", 0, BOOT_DEVICE_BOARD, spl_board_load_image); diff --git a/arch/arm/mach-uniphier/clk/clk-ld11.c b/arch/arm/mach-uniphier/clk/clk-ld11.c index 58069cbf15..b1e82a150a 100644 --- a/arch/arm/mach-uniphier/clk/clk-ld11.c +++ b/arch/arm/mach-uniphier/clk/clk-ld11.c @@ -9,7 +9,6 @@ #include #include -#include "../boot-mode/boot-device.h" #include "../init.h" #include "../sc64-regs.h" #include "../sg-regs.h" @@ -18,7 +17,7 @@ void uniphier_ld11_clk_init(void) { /* if booted from a device other than USB, without stand-by MPU */ if ((readl(SG_PINMON0) & BIT(27)) && - spl_boot_device_raw() != BOOT_DEVICE_USB) { + uniphier_boot_device_raw() != BOOT_DEVICE_USB) { writel(1, SG_ETPHYPSHUT); writel(1, SG_ETPHYCNT); diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h index c41a5df8e9..6691d446c6 100644 --- a/arch/arm/mach-uniphier/init.h +++ b/arch/arm/mach-uniphier/init.h @@ -120,11 +120,14 @@ void uniphier_pro5_clk_init(void); void uniphier_pxs2_clk_init(void); void uniphier_ld11_clk_init(void); +unsigned int uniphier_boot_device_raw(void); int uniphier_pin_init(const char *pinconfig_name); void uniphier_smp_kick_all_cpus(void); void cci500_init(int nr_slaves); +#undef pr_warn #define pr_warn(fmt, args...) printf(fmt, ##args) +#undef pr_err #define pr_err(fmt, args...) printf(fmt, ##args) #endif /* __MACH_INIT_H */