From: Albert ARIBAUD Date: Tue, 8 Jan 2013 12:15:45 +0000 (+0100) Subject: Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' X-Git-Tag: v2013.01-rc3~9^2~1 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=79f38777947ac7685e2cef8bd977f954ab198c0e;p=u-boot Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' This required manual merging drivers/mtd/nand/Makefile and adding am335x_evm support for CONFIG_SPL_NAND_DRIVERS --- 79f38777947ac7685e2cef8bd977f954ab198c0e diff --cc drivers/mtd/nand/Makefile index 28e52bd08e,5322f3a953..2c3812c3ba --- a/drivers/mtd/nand/Makefile +++ b/drivers/mtd/nand/Makefile @@@ -26,22 -26,15 +26,23 @@@ include $(TOPDIR)/config.m LIB := $(obj)libnand.o ifdef CONFIG_CMD_NAND + ifdef CONFIG_SPL_BUILD -ifdef CONFIG_SPL_NAND_SIMPLE -COBJS-y += nand_spl_simple.o + +ifdef CONFIG_SPL_NAND_DRIVERS +NORMAL_DRIVERS=y endif + + COBJS-$(CONFIG_SPL_NAND_AM33XX_BCH) += am335x_spl_bch.o -ifdef CONFIG_SPL_NAND_LOAD -COBJS-y += nand_spl_load.o -endif -else +COBJS-$(CONFIG_SPL_NAND_SIMPLE) += nand_spl_simple.o +COBJS-$(CONFIG_SPL_NAND_LOAD) += nand_spl_load.o +COBJS-$(CONFIG_SPL_NAND_ECC) += nand_ecc.o +COBJS-$(CONFIG_SPL_NAND_BASE) += nand_base.o + +else # not spl + +NORMAL_DRIVERS=y + COBJS-y += nand.o COBJS-y += nand_bbt.o COBJS-y += nand_ids.o @@@ -77,13 -66,7 +78,9 @@@ COBJS-$(CONFIG_NAND_SPEAR) += spr_nand. COBJS-$(CONFIG_TEGRA_NAND) += tegra_nand.o COBJS-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o COBJS-$(CONFIG_NAND_PLAT) += nand_plat.o -endif + - else # minimal SPL drivers - - COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_spl.o - +endif # drivers +endif # nand COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --cc include/configs/am335x_evm.h index ab9549b93b,aed40c8927..72459d859d --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@@ -240,6 -240,35 +240,38 @@@ #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" + #define CONFIG_SPL_BOARD_INIT + #define CONFIG_SPL_NAND_AM33XX_BCH + #define CONFIG_SPL_NAND_SUPPORT ++#define CONFIG_SPL_NAND_BASE ++#define CONFIG_SPL_NAND_DRIVERS ++#define CONFIG_SPL_NAND_ECC + #define CONFIG_SYS_NAND_5_ADDR_CYCLE + #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ + CONFIG_SYS_NAND_PAGE_SIZE) + #define CONFIG_SYS_NAND_PAGE_SIZE 2048 + #define CONFIG_SYS_NAND_OOBSIZE 64 + #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) + #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS + #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ + 10, 11, 12, 13, 14, 15, 16, 17, \ + 18, 19, 20, 21, 22, 23, 24, 25, \ + 26, 27, 28, 29, 30, 31, 32, 33, \ + 34, 35, 36, 37, 38, 39, 40, 41, \ + 42, 43, 44, 45, 46, 47, 48, 49, \ + 50, 51, 52, 53, 54, 55, 56, 57, } + + #define CONFIG_SYS_NAND_ECCSIZE 512 + #define CONFIG_SYS_NAND_ECCBYTES 14 + + #define CONFIG_SYS_NAND_ECCSTEPS 4 + #define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \ + CONFIG_SYS_NAND_ECCSTEPS) + + #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE + + #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 + /* * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM * 64 bytes before this address should be set aside for u-boot.img's