From: Łukasz Majewski <l.majewski@samsung.com>
Date: Mon, 17 Oct 2011 01:42:23 +0000 (+0000)
Subject: dcache:s5p CONFIG_SYS_CACHELINE_SIZE added for s5p GONI target
X-Git-Tag: v2011.12-rc1~228^2~79
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=7cb54948ae399042b70bec7870d26a24249461ea;p=u-boot

dcache:s5p CONFIG_SYS_CACHELINE_SIZE added for s5p GONI target

Define the D-cache line size for S5PC110 GONI reference target.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Anton Staaf <robotboy@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---

diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index a52b0a561b..3434de7f77 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -220,6 +220,8 @@
 
 #define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_SYS_LOAD_ADDR - 0x1000000)
 
+#define CONFIG_SYS_CACHELINE_SIZE       64
+
 #define CONFIG_PMIC
 #define CONFIG_PMIC_I2C
 #define CONFIG_PMIC_MAX8998