From: Mugunthan V N Date: Mon, 18 Jul 2016 09:40:57 +0000 (+0530) Subject: omap5/dra7: i2c: correct register offset for sync register X-Git-Tag: v2016.09-rc2~181^2~25 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=7fb825f5b112713f572917fa7e89aac2b5b9c7b4;p=u-boot omap5/dra7: i2c: correct register offset for sync register The register offset of i2c_sysc offset is not correct as per omap5[1]/dra7[2] TRM, correct the offsets as per the documentation. [1] - http://www.ti.com/lit/pdf/swpu249 [2] - http://www.ti.com/lit/pdf/spruhz6 Signed-off-by: Mugunthan V N Reviewed-by: Tom Rini --- diff --git a/arch/arm/include/asm/arch-omap5/i2c.h b/arch/arm/include/asm/arch-omap5/i2c.h index d875cfe0b4..2b55edf7f0 100644 --- a/arch/arm/include/asm/arch-omap5/i2c.h +++ b/arch/arm/include/asm/arch-omap5/i2c.h @@ -14,9 +14,9 @@ struct i2c { unsigned short revnb_lo; /* 0x00 */ unsigned short res1; unsigned short revnb_hi; /* 0x04 */ - unsigned short res2[13]; - unsigned short sysc; /* 0x20 */ - unsigned short res3; + unsigned short res2[5]; + unsigned short sysc; /* 0x10 */ + unsigned short res3[9]; unsigned short irqstatus_raw; /* 0x24 */ unsigned short res4; unsigned short stat; /* 0x28 */