From: David Brownell <dbrownell@users.sourceforge.net>
Date: Thu, 26 Nov 2009 00:05:35 +0000 (-0800)
Subject: NEWS updates
X-Git-Tag: v0.4.0-rc1~325
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=83568b6b62b3508f10aa3a51fe4ae86421ec5d27;p=openocd

NEWS updates

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
---

diff --git a/NEWS b/NEWS
index a0bf43c2..c5811bce 100644
--- a/NEWS
+++ b/NEWS
@@ -10,10 +10,20 @@ Boundary Scan:
 Target Layer:
 	ARM
 		- renamed "armv4_5" command prefix as "arm"
+		- recognize TrustZone "Secure Monitor" mode
+		- "arm regs" command output changed
+		- register names use "sp" not "r13"
 	ARM11
 		- Preliminary ETM and ETB hookup
 		- accelerated "flash erase_check"
 		- accelerated GDB memory checksum
+		- support "arm regs" command
+		- can access all core modes and registers
+	Cortex-A8
+		- support "arm regs" command
+		- can access all core modes and registers
+	Cortex-M3
+		- Exposed DWT registers like cycle counter
 
 Flash Layer:
 	'flash bank' and 'nand device' take <bank_name> as first argument.