From: Simon Glass <sjg@chromium.org>
Date: Mon, 3 Oct 2016 00:00:56 +0000 (-0600)
Subject: README: Drop old Intel Monahans comment
X-Git-Tag: v2016.11-rc2~78
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=84777634621d13a75ea33c7c2ed1a7a76a609a93;p=u-boot

README: Drop old Intel Monahans comment

This is no longer in the U-Boot source code, so drop this note from the
README.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---

diff --git a/README b/README
index f29bf50ad0..2865cd7f0b 100644
--- a/README
+++ b/README
@@ -578,20 +578,6 @@ The following options need to be configured:
 		CONFIG_SYS_FSL_SEC_LE
 		Defines the SEC controller register space as Little Endian
 
-- Intel Monahans options:
-		CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO
-
-		Defines the Monahans run mode to oscillator
-		ratio. Valid values are 8, 16, 24, 31. The core
-		frequency is this value multiplied by 13 MHz.
-
-		CONFIG_SYS_MONAHANS_TURBO_RUN_MODE_RATIO
-
-		Defines the Monahans turbo mode to oscillator
-		ratio. Valid values are 1 (default if undefined) and
-		2. The core frequency as calculated above is multiplied
-		by this value.
-
 - MIPS CPU options:
 		CONFIG_SYS_INIT_SP_OFFSET