From: Sonic Zhang <sonic.zhang@analog.com>
Date: Thu, 11 Apr 2013 09:42:38 +0000 (+0800)
Subject: blackfin: Add comments for watchdog event initialization.
X-Git-Tag: v2013.07-rc1~1^2~53^2~2
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=85f2f8f9adb13535cefcbd4987d2e8e5a978ccd4;p=u-boot

blackfin: Add comments for watchdog event initialization.

- Add comments for watchdog event initialization.
- Make sure the writting operation to MMRs are finished.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
---

diff --git a/arch/blackfin/cpu/initcode.c b/arch/blackfin/cpu/initcode.c
index 5fc06e11ff..ffaf1017d7 100644
--- a/arch/blackfin/cpu/initcode.c
+++ b/arch/blackfin/cpu/initcode.c
@@ -458,15 +458,23 @@ program_early_devices(ADI_BOOT_DATA *bs, uint *sdivB, uint *divB, uint *vcoB)
 	if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_BYPASS) {
 		serial_putc('e');
 #ifdef __ADSPBF60x__
+		/* Reset system event controller */
 		bfin_write_SEC_GCTL(0x2);
+		bfin_write_SEC_CCTL(0x2);
 		SSYNC();
+
+		/* Enable fault event input and system reset action in fault
+		 * controller. Route watchdog timeout event to fault interface.
+		 */
 		bfin_write_SEC_FCTL(0xc1);
+		/* Enable watchdog interrupt source */
 		bfin_write_SEC_SCTL(2, bfin_read_SEC_SCTL(2) | 0x6);
-
-		bfin_write_SEC_CCTL(0x2);
 		SSYNC();
+
+		/* Enable system event controller */
 		bfin_write_SEC_GCTL(0x1);
 		bfin_write_SEC_CCTL(0x1);
+		SSYNC();
 #endif
 		bfin_write_WDOG_CTL(WDDIS);
 		SSYNC();