From: Minkyu Kang Date: Wed, 24 Mar 2010 06:31:06 +0000 (+0900) Subject: SAMSUNG: make s5p common gpio functions X-Git-Tag: v2010.09-rc1~28^2~7^2~16 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=8677f127d68e9fa0c7a7af39f737c4231a98ab09;p=u-boot SAMSUNG: make s5p common gpio functions Because of s5pc1xx gpio is same as s5p seires SoC, move gpio functions to drvier/gpio/ and modify structure's name from s5pc1xx_ to s5p_. Signed-off-by: Minkyu Kang --- diff --git a/cpu/arm_cortexa8/s5pc1xx/Makefile b/cpu/arm_cortexa8/s5pc1xx/Makefile index 01c93feda8..3785593d25 100644 --- a/cpu/arm_cortexa8/s5pc1xx/Makefile +++ b/cpu/arm_cortexa8/s5pc1xx/Makefile @@ -33,7 +33,6 @@ SOBJS += reset.o COBJS += clock.o COBJS += cpu_info.o -COBJS += gpio.o COBJS += sromc.o COBJS += timer.o diff --git a/cpu/arm_cortexa8/s5pc1xx/gpio.c b/cpu/arm_cortexa8/s5pc1xx/gpio.c deleted file mode 100644 index a97244bf30..0000000000 --- a/cpu/arm_cortexa8/s5pc1xx/gpio.c +++ /dev/null @@ -1,143 +0,0 @@ -/* - * (C) Copyright 2009 Samsung Electronics - * Minkyu Kang - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include -#include - -#define CON_MASK(x) (0xf << ((x) << 2)) -#define CON_SFR(x, v) ((v) << ((x) << 2)) - -#define DAT_MASK(x) (0x1 << (x)) -#define DAT_SET(x) (0x1 << (x)) - -#define PULL_MASK(x) (0x3 << ((x) << 1)) -#define PULL_MODE(x, v) ((v) << ((x) << 1)) - -#define DRV_MASK(x) (0x3 << ((x) << 1)) -#define DRV_SET(x, m) ((m) << ((x) << 1)) -#define RATE_MASK(x) (0x1 << (x + 16)) -#define RATE_SET(x) (0x1 << (x + 16)) - -void gpio_cfg_pin(struct s5pc1xx_gpio_bank *bank, int gpio, int cfg) -{ - unsigned int value; - - value = readl(&bank->con); - value &= ~CON_MASK(gpio); - value |= CON_SFR(gpio, cfg); - writel(value, &bank->con); -} - -void gpio_direction_output(struct s5pc1xx_gpio_bank *bank, int gpio, int en) -{ - unsigned int value; - - gpio_cfg_pin(bank, gpio, GPIO_OUTPUT); - - value = readl(&bank->dat); - value &= ~DAT_MASK(gpio); - if (en) - value |= DAT_SET(gpio); - writel(value, &bank->dat); -} - -void gpio_direction_input(struct s5pc1xx_gpio_bank *bank, int gpio) -{ - gpio_cfg_pin(bank, gpio, GPIO_INPUT); -} - -void gpio_set_value(struct s5pc1xx_gpio_bank *bank, int gpio, int en) -{ - unsigned int value; - - value = readl(&bank->dat); - value &= ~DAT_MASK(gpio); - if (en) - value |= DAT_SET(gpio); - writel(value, &bank->dat); -} - -unsigned int gpio_get_value(struct s5pc1xx_gpio_bank *bank, int gpio) -{ - unsigned int value; - - value = readl(&bank->dat); - return !!(value & DAT_MASK(gpio)); -} - -void gpio_set_pull(struct s5pc1xx_gpio_bank *bank, int gpio, int mode) -{ - unsigned int value; - - value = readl(&bank->pull); - value &= ~PULL_MASK(gpio); - - switch (mode) { - case GPIO_PULL_DOWN: - case GPIO_PULL_UP: - value |= PULL_MODE(gpio, mode); - break; - default: - return; - } - - writel(value, &bank->pull); -} - -void gpio_set_drv(struct s5pc1xx_gpio_bank *bank, int gpio, int mode) -{ - unsigned int value; - - value = readl(&bank->drv); - value &= ~DRV_MASK(gpio); - - switch (mode) { - case GPIO_DRV_1X: - case GPIO_DRV_2X: - case GPIO_DRV_3X: - case GPIO_DRV_4X: - value |= DRV_SET(gpio, mode); - break; - default: - return; - } - - writel(value, &bank->drv); -} - -void gpio_set_rate(struct s5pc1xx_gpio_bank *bank, int gpio, int mode) -{ - unsigned int value; - - value = readl(&bank->drv); - value &= ~RATE_MASK(gpio); - - switch (mode) { - case GPIO_DRV_FAST: - case GPIO_DRV_SLOW: - value |= RATE_SET(gpio); - break; - default: - return; - } - - writel(value, &bank->drv); -} diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index d9660820bd..528ca2e99a 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -29,6 +29,7 @@ COBJS-$(CONFIG_AT91_GPIO) += at91_gpio.o COBJS-$(CONFIG_KIRKWOOD_GPIO) += kw_gpio.o COBJS-$(CONFIG_MX31_GPIO) += mx31_gpio.o COBJS-$(CONFIG_PCA953X) += pca953x.o +COBJS-$(CONFIG_S5PC1XX) += s5p_gpio.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/gpio/s5p_gpio.c b/drivers/gpio/s5p_gpio.c new file mode 100644 index 0000000000..0439477e46 --- /dev/null +++ b/drivers/gpio/s5p_gpio.c @@ -0,0 +1,143 @@ +/* + * (C) Copyright 2009 Samsung Electronics + * Minkyu Kang + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include + +#define CON_MASK(x) (0xf << ((x) << 2)) +#define CON_SFR(x, v) ((v) << ((x) << 2)) + +#define DAT_MASK(x) (0x1 << (x)) +#define DAT_SET(x) (0x1 << (x)) + +#define PULL_MASK(x) (0x3 << ((x) << 1)) +#define PULL_MODE(x, v) ((v) << ((x) << 1)) + +#define DRV_MASK(x) (0x3 << ((x) << 1)) +#define DRV_SET(x, m) ((m) << ((x) << 1)) +#define RATE_MASK(x) (0x1 << (x + 16)) +#define RATE_SET(x) (0x1 << (x + 16)) + +void gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg) +{ + unsigned int value; + + value = readl(&bank->con); + value &= ~CON_MASK(gpio); + value |= CON_SFR(gpio, cfg); + writel(value, &bank->con); +} + +void gpio_direction_output(struct s5p_gpio_bank *bank, int gpio, int en) +{ + unsigned int value; + + gpio_cfg_pin(bank, gpio, GPIO_OUTPUT); + + value = readl(&bank->dat); + value &= ~DAT_MASK(gpio); + if (en) + value |= DAT_SET(gpio); + writel(value, &bank->dat); +} + +void gpio_direction_input(struct s5p_gpio_bank *bank, int gpio) +{ + gpio_cfg_pin(bank, gpio, GPIO_INPUT); +} + +void gpio_set_value(struct s5p_gpio_bank *bank, int gpio, int en) +{ + unsigned int value; + + value = readl(&bank->dat); + value &= ~DAT_MASK(gpio); + if (en) + value |= DAT_SET(gpio); + writel(value, &bank->dat); +} + +unsigned int gpio_get_value(struct s5p_gpio_bank *bank, int gpio) +{ + unsigned int value; + + value = readl(&bank->dat); + return !!(value & DAT_MASK(gpio)); +} + +void gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode) +{ + unsigned int value; + + value = readl(&bank->pull); + value &= ~PULL_MASK(gpio); + + switch (mode) { + case GPIO_PULL_DOWN: + case GPIO_PULL_UP: + value |= PULL_MODE(gpio, mode); + break; + default: + return; + } + + writel(value, &bank->pull); +} + +void gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode) +{ + unsigned int value; + + value = readl(&bank->drv); + value &= ~DRV_MASK(gpio); + + switch (mode) { + case GPIO_DRV_1X: + case GPIO_DRV_2X: + case GPIO_DRV_3X: + case GPIO_DRV_4X: + value |= DRV_SET(gpio, mode); + break; + default: + return; + } + + writel(value, &bank->drv); +} + +void gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode) +{ + unsigned int value; + + value = readl(&bank->drv); + value &= ~RATE_MASK(gpio); + + switch (mode) { + case GPIO_DRV_FAST: + case GPIO_DRV_SLOW: + value |= RATE_SET(gpio); + break; + default: + return; + } + + writel(value, &bank->drv); +} diff --git a/include/asm-arm/arch-s5pc1xx/gpio.h b/include/asm-arm/arch-s5pc1xx/gpio.h index 8e4bb863f9..9a7faed319 100644 --- a/include/asm-arm/arch-s5pc1xx/gpio.h +++ b/include/asm-arm/arch-s5pc1xx/gpio.h @@ -22,7 +22,7 @@ #define __ASM_ARCH_GPIO_H #ifndef __ASSEMBLY__ -struct s5pc1xx_gpio_bank { +struct s5p_gpio_bank { unsigned int con; unsigned int dat; unsigned int pull; @@ -33,107 +33,107 @@ struct s5pc1xx_gpio_bank { }; struct s5pc100_gpio { - struct s5pc1xx_gpio_bank gpio_a0; - struct s5pc1xx_gpio_bank gpio_a1; - struct s5pc1xx_gpio_bank gpio_b; - struct s5pc1xx_gpio_bank gpio_c; - struct s5pc1xx_gpio_bank gpio_d; - struct s5pc1xx_gpio_bank gpio_e0; - struct s5pc1xx_gpio_bank gpio_e1; - struct s5pc1xx_gpio_bank gpio_f0; - struct s5pc1xx_gpio_bank gpio_f1; - struct s5pc1xx_gpio_bank gpio_f2; - struct s5pc1xx_gpio_bank gpio_f3; - struct s5pc1xx_gpio_bank gpio_g0; - struct s5pc1xx_gpio_bank gpio_g1; - struct s5pc1xx_gpio_bank gpio_g2; - struct s5pc1xx_gpio_bank gpio_g3; - struct s5pc1xx_gpio_bank gpio_i; - struct s5pc1xx_gpio_bank gpio_j0; - struct s5pc1xx_gpio_bank gpio_j1; - struct s5pc1xx_gpio_bank gpio_j2; - struct s5pc1xx_gpio_bank gpio_j3; - struct s5pc1xx_gpio_bank gpio_j4; - struct s5pc1xx_gpio_bank gpio_k0; - struct s5pc1xx_gpio_bank gpio_k1; - struct s5pc1xx_gpio_bank gpio_k2; - struct s5pc1xx_gpio_bank gpio_k3; - struct s5pc1xx_gpio_bank gpio_l0; - struct s5pc1xx_gpio_bank gpio_l1; - struct s5pc1xx_gpio_bank gpio_l2; - struct s5pc1xx_gpio_bank gpio_l3; - struct s5pc1xx_gpio_bank gpio_l4; - struct s5pc1xx_gpio_bank gpio_h0; - struct s5pc1xx_gpio_bank gpio_h1; - struct s5pc1xx_gpio_bank gpio_h2; - struct s5pc1xx_gpio_bank gpio_h3; + struct s5p_gpio_bank gpio_a0; + struct s5p_gpio_bank gpio_a1; + struct s5p_gpio_bank gpio_b; + struct s5p_gpio_bank gpio_c; + struct s5p_gpio_bank gpio_d; + struct s5p_gpio_bank gpio_e0; + struct s5p_gpio_bank gpio_e1; + struct s5p_gpio_bank gpio_f0; + struct s5p_gpio_bank gpio_f1; + struct s5p_gpio_bank gpio_f2; + struct s5p_gpio_bank gpio_f3; + struct s5p_gpio_bank gpio_g0; + struct s5p_gpio_bank gpio_g1; + struct s5p_gpio_bank gpio_g2; + struct s5p_gpio_bank gpio_g3; + struct s5p_gpio_bank gpio_i; + struct s5p_gpio_bank gpio_j0; + struct s5p_gpio_bank gpio_j1; + struct s5p_gpio_bank gpio_j2; + struct s5p_gpio_bank gpio_j3; + struct s5p_gpio_bank gpio_j4; + struct s5p_gpio_bank gpio_k0; + struct s5p_gpio_bank gpio_k1; + struct s5p_gpio_bank gpio_k2; + struct s5p_gpio_bank gpio_k3; + struct s5p_gpio_bank gpio_l0; + struct s5p_gpio_bank gpio_l1; + struct s5p_gpio_bank gpio_l2; + struct s5p_gpio_bank gpio_l3; + struct s5p_gpio_bank gpio_l4; + struct s5p_gpio_bank gpio_h0; + struct s5p_gpio_bank gpio_h1; + struct s5p_gpio_bank gpio_h2; + struct s5p_gpio_bank gpio_h3; }; struct s5pc110_gpio { - struct s5pc1xx_gpio_bank gpio_a0; - struct s5pc1xx_gpio_bank gpio_a1; - struct s5pc1xx_gpio_bank gpio_b; - struct s5pc1xx_gpio_bank gpio_c0; - struct s5pc1xx_gpio_bank gpio_c1; - struct s5pc1xx_gpio_bank gpio_d0; - struct s5pc1xx_gpio_bank gpio_d1; - struct s5pc1xx_gpio_bank gpio_e0; - struct s5pc1xx_gpio_bank gpio_e1; - struct s5pc1xx_gpio_bank gpio_f0; - struct s5pc1xx_gpio_bank gpio_f1; - struct s5pc1xx_gpio_bank gpio_f2; - struct s5pc1xx_gpio_bank gpio_f3; - struct s5pc1xx_gpio_bank gpio_g0; - struct s5pc1xx_gpio_bank gpio_g1; - struct s5pc1xx_gpio_bank gpio_g2; - struct s5pc1xx_gpio_bank gpio_g3; - struct s5pc1xx_gpio_bank gpio_i; - struct s5pc1xx_gpio_bank gpio_j0; - struct s5pc1xx_gpio_bank gpio_j1; - struct s5pc1xx_gpio_bank gpio_j2; - struct s5pc1xx_gpio_bank gpio_j3; - struct s5pc1xx_gpio_bank gpio_j4; - struct s5pc1xx_gpio_bank gpio_mp0_1; - struct s5pc1xx_gpio_bank gpio_mp0_2; - struct s5pc1xx_gpio_bank gpio_mp0_3; - struct s5pc1xx_gpio_bank gpio_mp0_4; - struct s5pc1xx_gpio_bank gpio_mp0_5; - struct s5pc1xx_gpio_bank gpio_mp0_6; - struct s5pc1xx_gpio_bank gpio_mp0_7; - struct s5pc1xx_gpio_bank gpio_mp1_0; - struct s5pc1xx_gpio_bank gpio_mp1_1; - struct s5pc1xx_gpio_bank gpio_mp1_2; - struct s5pc1xx_gpio_bank gpio_mp1_3; - struct s5pc1xx_gpio_bank gpio_mp1_4; - struct s5pc1xx_gpio_bank gpio_mp1_5; - struct s5pc1xx_gpio_bank gpio_mp1_6; - struct s5pc1xx_gpio_bank gpio_mp1_7; - struct s5pc1xx_gpio_bank gpio_mp1_8; - struct s5pc1xx_gpio_bank gpio_mp2_0; - struct s5pc1xx_gpio_bank gpio_mp2_1; - struct s5pc1xx_gpio_bank gpio_mp2_2; - struct s5pc1xx_gpio_bank gpio_mp2_3; - struct s5pc1xx_gpio_bank gpio_mp2_4; - struct s5pc1xx_gpio_bank gpio_mp2_5; - struct s5pc1xx_gpio_bank gpio_mp2_6; - struct s5pc1xx_gpio_bank gpio_mp2_7; - struct s5pc1xx_gpio_bank gpio_mp2_8; - struct s5pc1xx_gpio_bank res1[48]; - struct s5pc1xx_gpio_bank gpio_h0; - struct s5pc1xx_gpio_bank gpio_h1; - struct s5pc1xx_gpio_bank gpio_h2; - struct s5pc1xx_gpio_bank gpio_h3; + struct s5p_gpio_bank gpio_a0; + struct s5p_gpio_bank gpio_a1; + struct s5p_gpio_bank gpio_b; + struct s5p_gpio_bank gpio_c0; + struct s5p_gpio_bank gpio_c1; + struct s5p_gpio_bank gpio_d0; + struct s5p_gpio_bank gpio_d1; + struct s5p_gpio_bank gpio_e0; + struct s5p_gpio_bank gpio_e1; + struct s5p_gpio_bank gpio_f0; + struct s5p_gpio_bank gpio_f1; + struct s5p_gpio_bank gpio_f2; + struct s5p_gpio_bank gpio_f3; + struct s5p_gpio_bank gpio_g0; + struct s5p_gpio_bank gpio_g1; + struct s5p_gpio_bank gpio_g2; + struct s5p_gpio_bank gpio_g3; + struct s5p_gpio_bank gpio_i; + struct s5p_gpio_bank gpio_j0; + struct s5p_gpio_bank gpio_j1; + struct s5p_gpio_bank gpio_j2; + struct s5p_gpio_bank gpio_j3; + struct s5p_gpio_bank gpio_j4; + struct s5p_gpio_bank gpio_mp0_1; + struct s5p_gpio_bank gpio_mp0_2; + struct s5p_gpio_bank gpio_mp0_3; + struct s5p_gpio_bank gpio_mp0_4; + struct s5p_gpio_bank gpio_mp0_5; + struct s5p_gpio_bank gpio_mp0_6; + struct s5p_gpio_bank gpio_mp0_7; + struct s5p_gpio_bank gpio_mp1_0; + struct s5p_gpio_bank gpio_mp1_1; + struct s5p_gpio_bank gpio_mp1_2; + struct s5p_gpio_bank gpio_mp1_3; + struct s5p_gpio_bank gpio_mp1_4; + struct s5p_gpio_bank gpio_mp1_5; + struct s5p_gpio_bank gpio_mp1_6; + struct s5p_gpio_bank gpio_mp1_7; + struct s5p_gpio_bank gpio_mp1_8; + struct s5p_gpio_bank gpio_mp2_0; + struct s5p_gpio_bank gpio_mp2_1; + struct s5p_gpio_bank gpio_mp2_2; + struct s5p_gpio_bank gpio_mp2_3; + struct s5p_gpio_bank gpio_mp2_4; + struct s5p_gpio_bank gpio_mp2_5; + struct s5p_gpio_bank gpio_mp2_6; + struct s5p_gpio_bank gpio_mp2_7; + struct s5p_gpio_bank gpio_mp2_8; + struct s5p_gpio_bank res1[48]; + struct s5p_gpio_bank gpio_h0; + struct s5p_gpio_bank gpio_h1; + struct s5p_gpio_bank gpio_h2; + struct s5p_gpio_bank gpio_h3; }; /* functions */ -void gpio_cfg_pin(struct s5pc1xx_gpio_bank *bank, int gpio, int cfg); -void gpio_direction_output(struct s5pc1xx_gpio_bank *bank, int gpio, int en); -void gpio_direction_input(struct s5pc1xx_gpio_bank *bank, int gpio); -void gpio_set_value(struct s5pc1xx_gpio_bank *bank, int gpio, int en); -unsigned int gpio_get_value(struct s5pc1xx_gpio_bank *bank, int gpio); -void gpio_set_pull(struct s5pc1xx_gpio_bank *bank, int gpio, int mode); -void gpio_set_drv(struct s5pc1xx_gpio_bank *bank, int gpio, int mode); -void gpio_set_rate(struct s5pc1xx_gpio_bank *bank, int gpio, int mode); +void gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg); +void gpio_direction_output(struct s5p_gpio_bank *bank, int gpio, int en); +void gpio_direction_input(struct s5p_gpio_bank *bank, int gpio); +void gpio_set_value(struct s5p_gpio_bank *bank, int gpio, int en); +unsigned int gpio_get_value(struct s5p_gpio_bank *bank, int gpio); +void gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode); +void gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode); +void gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode); #endif /* Pin configurations */