From: Paul Fertser Date: Tue, 26 Nov 2013 17:33:48 +0000 (+0400) Subject: tcl/target: add config for Milandr's 1986ве1т controller X-Git-Tag: v0.8.0-rc1~159 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=871b34cf2cd667e1001729ce435d1fb0013762ff;p=openocd tcl/target: add config for Milandr's 1986ве1т controller This is a Cortex-M1 controller targetting aviation appliances. Contributed (and live-tested) by 8daemon. Change-Id: I133d6122cf6492b51ddbdbd800c16ba121d51bf3 Signed-off-by: Paul Fertser Reviewed-on: http://openocd.zylin.com/1818 Tested-by: jenkins Reviewed-by: Spencer Oliver --- diff --git "a/tcl/target/1986\320\262\320\2651\321\202.cfg" "b/tcl/target/1986\320\262\320\2651\321\202.cfg" new file mode 100644 index 00000000..98d51031 --- /dev/null +++ "b/tcl/target/1986\320\262\320\2651\321\202.cfg" @@ -0,0 +1,52 @@ +# 1986ВЕ1Т +# http://milandr.ru/index.php?mact=Products,cntnt01,details,0&cntnt01productid=236&cntnt01returnid=68 + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME 1986ве1т +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +# Work-area is a space in RAM used for flash programming +if { [info exists WORKAREASIZE] } { + set _WORKAREASIZE $WORKAREASIZE +} else { + set _WORKAREASIZE 0x4000 +} + +# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz +adapter_khz 1000 + +adapter_nsrst_delay 100 +jtag_ntrst_delay 100 + +#jtag scan chain +if { [info exists CPUTAPID] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x4ba00477 +} +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME + +# use AHB-Lite SRAM for work area +$_TARGETNAME configure -work-area-phys 0x20100000 -work-area-size $_WORKAREASIZE -work-area-backup 0 + +# can't handle overlapping memory regions +if { [info exists IMEMORY] && [string equal $IMEMORY true] } { + flash bank ${_CHIPNAME}_info.flash mdr 0x00000000 0x01000 0 0 $_TARGETNAME 1 1 4 +} else { + flash bank $_CHIPNAME.flash mdr 0x00000000 0x20000 0 0 $_TARGETNAME 0 32 4 +} + +# if srst is not fitted use SYSRESETREQ to +# perform a soft reset +cortex_m reset_config sysresetreq