From: Rick Chen <rick@andestech.com>
Date: Wed, 15 Nov 2017 08:03:34 +0000 (+0800)
Subject: dt-bindings: spi: Add andestech atcspi200 spi binding doc
X-Git-Tag: v2018.01-rc1~58^2~6
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=872cd42e706983b2efa928ec038f1f80d5eb5e87;p=u-boot

dt-bindings: spi: Add andestech atcspi200 spi binding doc

Add a document to describe Andestech atcspi200 spi and
binding information.

Signed-off-by: Rick Chen <rick@andestech.com>
---

diff --git a/doc/device-tree-bindings/spi/spi-atcspi200.txt b/doc/device-tree-bindings/spi/spi-atcspi200.txt
new file mode 100644
index 0000000000..9c0630b500
--- /dev/null
+++ b/doc/device-tree-bindings/spi/spi-atcspi200.txt
@@ -0,0 +1,37 @@
+Andestech ATCSPI200 SPI controller Device Tree Bindings
+-------------------------------------------------------
+ATCSPI200 is a Serial Peripheral Interface (SPI) controller
+which serves as a SPI master or a SPI slave.
+
+It is often be embedded in AE3XX and AE250 platforms.
+
+Required properties:
+- compatible: has to be "andestech,atcspi200".
+- reg: Base address and size of the controllers memory area.
+- #address-cells: <1>, as required by generic SPI binding.
+- #size-cells: <0>, also as required by generic SPI binding.
+- interrupts: Property with a value describing the interrupt number.
+- clocks: Clock phandles (see clock bindings for details).
+- spi-max-frequency: Maximum SPI clocking speed of device in Hz.
+
+Optional properties:
+- num-cs: Number of chip selects used.
+
+Example:
+
+	spi: spi@f0b00000 {
+		compatible = "andestech,atcspi200";
+		reg = <0xf0b00000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		num-cs = <1>;
+		clocks = <&spiclk>;
+		interrupts = <3 4>;
+		flash@0 {
+			compatible = "spi-flash";
+			spi-max-frequency = <50000000>;
+			reg = <0>;
+			spi-cpol;
+			spi-cpha;
+		};
+	};