From: Gabriel Huau Date: Sat, 25 Apr 2015 20:16:57 +0000 (-0700) Subject: x86: minnowmax: add GPIO banks in the device tree X-Git-Tag: v2015.07-rc1~41 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=8827227889848433d464f31c76c8be9d13567623;p=u-boot x86: minnowmax: add GPIO banks in the device tree There are 6 banks: 4 banks for CORE: available in S0 mode 2 banks for SUS (Suspend): available in S0-S5 mode Signed-off-by: Gabriel Huau Reviewed-by: Bin Meng Acked-by: Simon Glass --- diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts index ecd4a892c0..4be227a3b0 100644 --- a/arch/x86/dts/minnowmax.dts +++ b/arch/x86/dts/minnowmax.dts @@ -22,6 +22,48 @@ silent_console = <0>; }; + gpioa { + compatible = "intel,ich6-gpio"; + u-boot,dm-pre-reloc; + reg = <0 0x20>; + bank-name = "A"; + }; + + gpiob { + compatible = "intel,ich6-gpio"; + u-boot,dm-pre-reloc; + reg = <0x20 0x20>; + bank-name = "B"; + }; + + gpioc { + compatible = "intel,ich6-gpio"; + u-boot,dm-pre-reloc; + reg = <0x40 0x20>; + bank-name = "C"; + }; + + gpiod { + compatible = "intel,ich6-gpio"; + u-boot,dm-pre-reloc; + reg = <0x60 0x20>; + bank-name = "D"; + }; + + gpioe { + compatible = "intel,ich6-gpio"; + u-boot,dm-pre-reloc; + reg = <0x80 0x20>; + bank-name = "E"; + }; + + gpiof { + compatible = "intel,ich6-gpio"; + u-boot,dm-pre-reloc; + reg = <0xA0 0x20>; + bank-name = "F"; + }; + chosen { stdout-path = "/serial"; };