From: Philipp Rosenberger Date: Thu, 12 Nov 2015 17:23:10 +0000 (+0100) Subject: arm: socfpga: reset: FIX address of tstscratch register X-Git-Tag: v2016.01-rc2~109^2~6 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=8a30e3a73a0a7db44cf81f486feba684cbcb4be5;p=u-boot arm: socfpga: reset: FIX address of tstscratch register The Cyclone V Hard Processor System Technical Reference Manual in the chapter about the Reset Manager Module Address Map stats that the offset of the tstscratch register ist 0x54 not 0x24. Cyclone V Hard Processor System Technical Reference Manual cv_5v4 2015.11.02 page 3-17 Reset Manager Module Address Map Signed-off-by: Philipp Rosenberger --- diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager.h b/arch/arm/mach-socfpga/include/mach/reset_manager.h index 666a2ef8df..e50fbd86e6 100644 --- a/arch/arm/mach-socfpga/include/mach/reset_manager.h +++ b/arch/arm/mach-socfpga/include/mach/reset_manager.h @@ -25,6 +25,7 @@ struct socfpga_reset_manager { u32 per2_mod_reset; u32 brg_mod_reset; u32 misc_mod_reset; + u32 padding2[12]; u32 tstscratch; };