From: Kever Yang Date: Mon, 18 Dec 2017 07:13:19 +0000 (+0800) Subject: rockchip: update ROCKCHIP_SPL_RESERVE_IRAM to 0 X-Git-Tag: v2018.01-rc2~2^2~3 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=8a8106f06639314f750c9f8dc2b72df3925f7fbf;p=u-boot rockchip: update ROCKCHIP_SPL_RESERVE_IRAM to 0 Only rk3399 atf need ROCKCHIP_SPL_RESERVE_IRAM. This commit updates its default setting to 0 so that other SoCs do not need to define it. Signed-off-by: Kever Yang Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich --- diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 1e74db3607..967290f9a5 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -179,7 +179,7 @@ config ROCKCHIP_BOOT_MODE_REG config ROCKCHIP_SPL_RESERVE_IRAM hex "Size of IRAM reserved in SPL" - default 0x4000 + default 0 help SPL may need reserve memory for firmware loaded by SPL, whose load address is in IRAM and may overlay with SPL text area if not diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index 7b5ea821f9..e8e52c3a7c 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -4,6 +4,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_ROCKCHIP_RK3399=y +CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb" CONFIG_DEBUG_UART=y diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig index 731222cdd0..b8d065414a 100644 --- a/configs/firefly-rk3399_defconfig +++ b/configs/firefly-rk3399_defconfig @@ -4,6 +4,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_ROCKCHIP_RK3399=y +CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 CONFIG_SPL_STACK_R_ADDR=0x80000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-firefly" CONFIG_DEBUG_UART=y