From: Dinh Nguyen <dinguyen@opensource.altera.com>
Date: Wed, 15 Apr 2015 21:44:33 +0000 (-0500)
Subject: arm: socfpga: spl: update peripheral pll for dev kit
X-Git-Tag: v2015.07-rc1~61^2~5
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=8b73dda86b5ce3c1f67385e812d79785f95157f1;p=u-boot

arm: socfpga: spl: update peripheral pll for dev kit

"commit 0d13a0051b2c arm: socfpga: Sync Cyclone V DK PLL configuration"
mistakenly changed CONFIG_HPS_MAINPLLGRP_VCO_NUMER to 39, the correct
value should be 79.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---

diff --git a/board/altera/socfpga/pll_config.h b/board/altera/socfpga/pll_config.h
index 8130fa4744..7cd25df614 100644
--- a/board/altera/socfpga/pll_config.h
+++ b/board/altera/socfpga/pll_config.h
@@ -36,7 +36,7 @@
 
 /* Peripheral PLL */
 #define CONFIG_HPS_PERPLLGRP_VCO_DENOM			(1)
-#define CONFIG_HPS_PERPLLGRP_VCO_NUMER			(39)
+#define CONFIG_HPS_PERPLLGRP_VCO_NUMER			(79)
 /*
  * To tell where is the VCOs source:
  * 0 = EOSC1