From: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
Date: Fri, 11 Mar 2016 07:40:26 +0000 (+0530)
Subject: ARM64: zynqmp: Add ddrc node in dts
X-Git-Tag: v2016.05-rc2~64^2~33
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=908690098c1836055ee98bde045308ca2ae5d56e;p=u-boot

ARM64: zynqmp: Add ddrc node in dts

This patch adds ddrc memory controller node in dts.
size mentioned in dts is 0x30000, because we need to access DDR_QOS
INTR registers located at fd090208 from this driver.

Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 45209309c0..b68fb1a4a5 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -506,6 +506,13 @@
 			power-domains = <&pd_adma>;
 		};
 
+		mc: memory-controller@fd070000 {
+			compatible = "xlnx,zynqmp-ddrc-2.40a";
+			reg = <0x0 0xfd070000 0x30000>;
+			interrupt-parent = <&gic>;
+			interrupts = <0 112 4>;
+		};
+
 		nand0: nand@ff100000 {
 			compatible = "arasan,nfc-v3p10";
 			status = "disabled";