From: Sven Oliver Moll <svolli@svolli.de>
Date: Mon, 29 Aug 2016 21:29:31 +0000 (+0200)
Subject: 4510 support: fixed some cosmetical stuff and documentation
X-Git-Tag: V2.16~75^2~2
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=91f8e09bcc172a09da2e90177fbf6f1641c6c0dd;p=cc65

4510 support: fixed some cosmetical stuff and documentation
---

diff --git a/doc/ca65.sgml b/doc/ca65.sgml
index f59ce44cb..80515fc50 100644
--- a/doc/ca65.sgml
+++ b/doc/ca65.sgml
@@ -476,10 +476,13 @@ from the mentioned web page, for more information, see there.
 <sect1>4510 mode<p>
 
 The 4510 is a microcontroller that is the core of the Commodore C65 aka C64DX.
-It contains among other functions a slightly modified 65CE02 CPU, to allow
+It contains among other functions a slightly modified 65CE02/4502 CPU, to allow
 address mapping for 20 bits of address space (1 megabyte addressable area).
-As compared to the description of the CPU in the System Specification of the
-Commodore C65 aka C64DX prototypes ca65 uses these changes:
+As compared to the description of the CPU in the
+<url url="http://www.zimmers.net/anonftp/pub/cbm/c65/c65manualupdated.txt.gz"
+name="C65 System Specification">
+<url url="https://raw.githubusercontent.com/MEGA65/c65-specifications/master/c65manualupdated.txt"
+name="(updated version)"> uses these changes:
 <itemize>
 <item><tt>LDA (d,SP),Y</tt> may also be written as <tt>LDA (d,S),Y</tt>
 (matching the 65816 notataion).
@@ -488,7 +491,8 @@ branch you have to prefix these with an "L" (e.g. "<tt>LBNE</tt>" instead of
 "<tt>BNE</tt>"). This might change at a later implementation of the assember.
 </itemize>
 For more information about the Commodore C65/C64DX and the 4510 CPU, see
-<url url="http://www.zimmers.net/anonftp/pub/cbm/c65/c65manualupdated.txt.gz">.
+<url url="http://www.zimmers.net/anonftp/pub/cbm/c65/"> and
+<url url="https://en.wikipedia.org/wiki/Commodore_65" name="Wikipedia">.
 
 
 <sect1>sweet16 mode<label id="sweet16-mode"><p>
diff --git a/src/ca65/ea65.c b/src/ca65/ea65.c
index e146ab8c9..2f7c2bfa9 100644
--- a/src/ca65/ea65.c
+++ b/src/ca65/ea65.c
@@ -145,12 +145,11 @@ void GetEA (EffAddr* A)
             if (CurTok.Tok == TOK_COMMA) {
                 /* (adr),y */
                 NextTok ();
-                switch(CurTok.Tok) {
+                switch (CurTok.Tok) {
                 case TOK_Z:
-                    if (CPU == CPU_4510) {
-                        NextTok ();
-                        A->AddrModeSet = AM65_DIR_IND;
-                    }
+                    /* only set by scanner.c if in 4510-mode */
+                    NextTok ();
+                    A->AddrModeSet = AM65_DIR_IND;
                     break;
                 default:
                     Consume (TOK_Y, "`Y' expected");
diff --git a/src/ca65/instr.c b/src/ca65/instr.c
index a4365402d..26722fab3 100644
--- a/src/ca65/instr.c
+++ b/src/ca65/instr.c
@@ -1290,7 +1290,7 @@ static void PutPCRel16 (const InsDesc* Ins)
 static void PutPCRel4510 (const InsDesc* Ins)
 /* Handle branches with a 16 bit distance */
 {
-    /* 16 bit branch opcode is 8 bit branch opcode or 0x03 */
+    /* 16 bit branch opcode is 8 bit branch opcode or'ed with 0x03 */
     EmitPCRel (Ins->BaseCode, GenBranchExpr (2), 2);
 }
 
@@ -1543,33 +1543,33 @@ static void PutAll (const InsDesc* Ins)
 
 
 static void Put4510 (const InsDesc* Ins)
-/* Handle all other instructions */
+/* Handle all other instructions, with modifications for 4510 */
 {
-    /* The 4510 uses all 256 possible opcodes, so the last ones were cramped
-     * in where an opcode was still undefined. As a result, some of those
-     * don't follow any rules for encoding the addressmodes. So the EATab
-     * approach does not work always. In this function, the wrongly calculated
-     * opcode is replaced by the correct one "on the fly". Suggestions for a
-     * better approach are welcome.
-     *
-     * These are:
-     * $20 -> $22 : JSR ($1234) NEED TO CHECK FOR ADDRESSING
-     * $30 -> $23 : JSR ($1234,X)
-     * $47 -> $44 : ASR $12
-     * $57 -> $54 : ASR $12,X
-     * $93 -> $82 : STA ($12,SP),Y
-     * $9c -> $8b : STY $1234,X
-     * $9e -> $9b : STX $1234,Y
-     * $af -> $ab : LDZ $1234
-     * $bf -> $bb : LDZ $1234,X
-     * $b3 -> $e2 : LDA ($12,SP),Y
-     * $d0 -> $c2 : CPZ #$00
-     */
+    /* The 4510 uses all 256 possible opcodes, so the last ones were crammed
+    ** in where an opcode was still undefined. As a result, some of those
+    ** don't follow any rules for encoding the addressmodes. So the EATab
+    ** approach does not work always. In this function, the wrongly calculated
+    ** opcode is replaced by the correct one "on the fly". Suggestions for a
+    ** better approach are welcome.
+    **
+    ** These are:
+    ** $20 -> $22 : JSR ($1234) NEED TO CHECK FOR ADDRESSING
+    ** $30 -> $23 : JSR ($1234,X)
+    ** $47 -> $44 : ASR $12
+    ** $57 -> $54 : ASR $12,X
+    ** $93 -> $82 : STA ($12,SP),Y
+    ** $9c -> $8b : STY $1234,X
+    ** $9e -> $9b : STX $1234,Y
+    ** $af -> $ab : LDZ $1234
+    ** $bf -> $bb : LDZ $1234,X
+    ** $b3 -> $e2 : LDA ($12,SP),Y
+    ** $d0 -> $c2 : CPZ #$00
+    */
     EffAddr A;
 
     /* Evaluate the addressing mode used */
     if (EvalEA (Ins, &A)) {
-        switch(A.Opcode) {
+        switch (A.Opcode) {
             case 0x20: if(A.AddrModeBit == AM65_ABS_IND) A.Opcode = 0x22; break;
             case 0x30: A.Opcode = 0x23; break;
             case 0x47: A.Opcode = 0x44; break;
diff --git a/src/ca65/scanner.c b/src/ca65/scanner.c
index 4fde5ac5e..f33ed5def 100644
--- a/src/ca65/scanner.c
+++ b/src/ca65/scanner.c
@@ -1170,7 +1170,7 @@ Again:
                     CurTok.Tok = TOK_S;
                     return;
                 }
-                /* fall through */
+                /* FALL THROUGH */
             default:
                 if (CPU == CPU_SWEET16 &&
                    (CurTok.IVal = Sweet16Reg (&CurTok.SVal)) >= 0) {