From: Yuri Tikhonov <yur@emcraft.com>
Date: Thu, 21 Feb 2008 10:06:07 +0000 (+0100)
Subject: Fix CPU POST test failure
X-Git-Tag: v1.3.2-rc2~27
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=928d1d77f8623c120d8763e20e1ca58df9c5c4c6;p=u-boot

Fix CPU POST test failure

The CPU POST test code (run from cpu_post_exec_31()) doesn't follow the
ABI carefully, at least the CR3, CR4, and CR5 fields of CR are clobbered
by it. The gcc-4.2 with its more aggressive optimization exposes this fact.
This patch just saves the CR value before running the test code, so allowing
it to do anything it wants with CR.

Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Acked-by: Yuri Tikhonov <yur@emcraft.com>
--
---

diff --git a/post/lib_ppc/asm.S b/post/lib_ppc/asm.S
index 5e72b3418f..12791762ba 100644
--- a/post/lib_ppc/asm.S
+++ b/post/lib_ppc/asm.S
@@ -308,7 +308,10 @@ cpu_post_exec_31:
 	lwz	r3, 0(r4)
 	lwz	r4, 0(r5)
 	mr	r6, r7
+
+	mfcr	r7
 	blrl
+	mtcr	r7
 
 	lwz	r7, 8(r1)
 	stw	r3, 0(r7)