From: Øyvind Harboe <oyvind.harboe@zylin.com>
Date: Tue, 17 Nov 2009 10:03:55 +0000 (+0100)
Subject: jtag_registers: Avalon bridge flushing tweaks
X-Git-Tag: v0.4.0-rc1~533
X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=959b373f8cdc2c1ad11c67c6916f88f48769438f;p=openocd

jtag_registers: Avalon bridge flushing tweaks

The code is now much more explicit. It flushes every
N writes. For now flush every time, but tinkering with
the bridge FIFO size and how often we flush clearly
points in the direction of the Avalon write FIFO full
being the culprit.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
---

diff --git a/src/jtag/zy1000/jtag_minidriver.h b/src/jtag/zy1000/jtag_minidriver.h
index 3fe16ef3..afbea13a 100644
--- a/src/jtag/zy1000/jtag_minidriver.h
+++ b/src/jtag/zy1000/jtag_minidriver.h
@@ -30,8 +30,19 @@ int  diag_printf(const char *fmt, ...);
 #define ZY1000_POKE(a, b) HAL_WRITE_UINT32(a, b); diag_printf("poke 0x%08x,0x%08x\n", a, b)
 #define ZY1000_PEEK(a, b) HAL_READ_UINT32(a, b); diag_printf("peek 0x%08x = 0x%08x\n", a, b)
 #else
-#define ZY1000_POKE(a, b) HAL_WRITE_UINT32(a, b)
 #define ZY1000_PEEK(a, b) HAL_READ_UINT32(a, b)
+#define ZY1000_POKE(a, b) HAL_WRITE_UINT32(a, b);\
+ {/* This will flush the bridge FIFO. Overflowed bridge FIFO fails. We must \
+ flush every "often". No precise system has been found, but 4 seems solid. \
+  */ \
+ static int overflow_counter = 0; \
+   if (++overflow_counter >= 1) \
+   { \
+	   /* clear FIFO */ \
+	   cyg_uint32 empty; ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, empty); \
+	   overflow_counter = 0; \
+   } \
+ }
 #endif
 
 // FIFO empty?