From: Guenter Roeck Date: Tue, 11 Apr 2017 12:31:28 +0000 (-0700) Subject: Register map as CSV X-Git-Tag: v1.0~38 X-Git-Url: https://git.sur5r.net/?a=commitdiff_plain;h=96544e8ed5c9c97697d8e7b7c955a4910d66302a;p=groeck-it87 Register map as CSV Signed-off-by: Guenter Roeck --- diff --git a/ITE_Register_map.csv b/ITE_Register_map.csv new file mode 100644 index 0000000..b8c02f0 --- /dev/null +++ b/ITE_Register_map.csv @@ -0,0 +1,68 @@ +,IT8603E,IT8606E,IT8607E,IT8613E,IT8620E,IT8622E,IT8625E,IT8626E,IT8628E,IT8655E,IT8665E,IT8686E,IT8732,IT8790E,IT8792E +FAN1_TAC_EN,,0x13[4],0x13[4],-,0x13[4],0x13[4],,,0x13[4],0x13[4],0x13[4],0x13[4],0x13[4],0x13[4],0x13[4] +FAN2_TAC_EN,,0x13[5],0x13[5],0x13[5],0x13[5],0x13[5],,,0x13[5],0x13[5],0x13[5],0x13[5],0x13[5],0x13[5],0x13[5] +FAN3_TAC_EN,,0x13[6],0x13[6],0x13[6],0x13[6],0x13[6],,,0x13[6],0x13[6],0x13[6],0x13[6],0x13[6],0x13[6],0x13[6] +FAN4_TAC_EN,,0x0c[4],,0x0c[4],0x0c[4],0x0c[4],,,0x0c[4],-,0x0c[4],0x0c[4],0x0c[4],-,- +FAN5_TAC_EN,,0x0c[5],,0x0c[5],0x0c[5],0x0c[5],,,0x0c[5],-,0x0c[5],0x0c[5],-,-,- +FAN6_TAC_EN,,,,,0x0c[2],-,0x0b[3]/0xd3[1],,0x0c[2],-,0x0b[3],0x0c[2],-,-,- +FAN6_CTL_EN,,,,,0x0b[3],,0xd3[0],,,,,,-,-,- +FAN1_TAC,,0x18/0x0d,0x18/0x0d,,0x18/0x0d,0x18/0x0d,,,0x18/0x0d,0x18/0x0d,0x18/0x0d,0x18/0x0d,0x18/0x0d,0x18/0x0d,0x18/0x0d +FAN2_TAC,,0x19/0x0e,0x19/0x0e,0x19/0x0e,0x19/0x0e,0x19/0x0e,,,0x19/0x0e,0x19/0x0e,0x19/0x0e,0x19/0x0e,0x19/0x0e,0x19/0x0e,0x19/0x0e +FAN3_TAC,,0x1a/0x0f,0x1a/0x0f,0x1a/0x0f,0x1a/0x0f,0x1a/0x0f,,,0x1a/0x0f,0x1a/0x0f,0x1a/0x0f,0x1a/0x0f,0x1a/0x0f,0x1a/0x0f,0x1a/0x0f +FAN4_TAC,,0x81/0x80,,0x81/0x80,0x81/0x80,0x81/0x80,,,0x81/0x80,-,0x81/0x80,0x81/0x80,0x81/0x80,-,- +FAN5_TAC,,0x83/0x82,,0x83/0x82,0x83/0x82,0x83/0x82,,,0x83/0x82,-,0x83/0x82,0x83/0x82,-,-,- +FAN6_TAC,,,,,0x4c/0x4d,-,0x94/0x93,,0x4d/0x4c,-,0x94/0x93,0x4d/0x4c,-,-,- +FAN1_LIMIT,,0x1b/0x10,0x1b/0x10,,0x1b/0x10,0x1b/0x10,,,0x1b/0x10,0x1b/0x10,0x1b/0x10,0x1b/0x10,0x1b/0x10,0x1b/0x10,0x1b/0x10 +FAN2_LIMIT,,0x1c/0x11,0x1c/0x11,0x1c/0x11,0x1c/0x11,0x1c/0x11,,,0x1c/0x11,0x1c/0x11,0x1c/0x11,0x1c/0x11,0x1c/0x11,0x1c/0x11,0x1c/0x11 +FAN3_LIMIT,,0x1d/0x12,0x1d/0x12,0x1d/0x12,0x1d/0x12,0x1d/0x12,,,0x1d/0x12,0x1d/0x12,0x1d/0x12,0x1d/0x12,0x1d/0x12,0x1d/0x12,0x1d/0x12 +FAN4_LIMIT,,,,0x85/0x84,0x85/0x84,0x85/0x84,,,0x85/0x84,-,0x85/0x84,0x85/0x84,0x85/0x84,-,- +FAN5_LIMIT,,,,0x87/0x86,0x87/0x86,0x87/0x86,,,0x87/0x86,-,0x87/0x86,0x87/0x86,-,-,- +FAN6_LIMIT,,,,,0x4f/0x4e,-,0xb3/0xb2,,0x4f/0x4e,-,0xb3/0xb2,0x4f/0x4e,-,-,- +FAN1_PWM_CTL,,0x15,0x15,,0x15,0x15,,,0x15,0x15,0x15,0x15,0x15,0x15,0x15 +FAN2_PWM_CTL,,0x16,0x16,,0x16,0x16,,,0x16,0x16,0x16,0x16,0x16,0x16,0x16 +FAN3_PWM_CTL,,0x17,0x17,,0x17,0x17,,,0x17,0x17,0x17,0x17,0x17,0x17,0x17 +FAN4_PWM_CTL,,0x7f,,0x1e,0x7f,0x1e,0x1e,,0x7f,-,0x1e,0x7f,?,-,- +FAN5_PWM_CTL,,0xa7,,0x1f,0xa7,0x1f,0x1f,,0xa7,-,0x1f,0xa7,-,-,- +FAN6_PWM_CTL,,0xaf,,,0xaf,-,,,0xaf,-,0x92,0xaf,-,-,- +PWM1_FREQ,,0x14[6-4],0x14[6-4],,0x14[6-4],0x14[6-4],,,0x14[6-4],0x14[6-4],0x14[6-4],0x14[6-4],0x14[6-4],0x14[6-4],0x14[6-4] +PWM2_FREQ,,0x55[6-4],0x55[6-4],,0x55[6-4],0x55[6-4],,,0x55[6-4],0x55[6-4],0x55[6-4],0x55[6-4],0x55[6-4],0x55[6-4],0x55[6-4] +,,,,,,,,,,,,,,, +FAN_CTL outp mode,,no,0x13[2-0],no,0x13[2-0],no,no,,0x13[2-0],no,no,no,0x13[2-0],0x13[2-0],0x13[2-0] +FAN_CTL ON/OFF,no,no,0x14[0-2],no,0x14[0-2],no,no,,0x14[2-0],no,no,no,0x14[2-0],0x14[2-0],0x14[2-0] +FAN CTL polarity,,,0x14[7],0x14[7],0x14[7],0x14[7],0x14[7],,0x14[7],0x14[7],0x14[7],15/16/17/7f/a7/af[6],0x14[7],0x14[7],0x14[7] +,,,,,,,,,,,,,,, +ADC res.,12 mV,,12 mV,11 mV,12 mV,12 mV,11 mV,,12 mV,10.9 mV,10.9 mV,12 mV,10.9 mV,10.9 mV,10.9 mV +,,,,,,,,,,,,,,, +,IT8603E,IT8606E,IT8607E,IT8613E,IT8620E,IT8622E,IT8625E,IT8626E,IT8628E,IT8655E,IT8665E,IT8686E,IT8732,IT8790E,IT8792E +,,,,,,,,,,,,,,, +AVCC3,,0x2f,0x2f,,0x2f,0x2f,0x2f,,0x2f,0x2f,0x2f,0x2f,-,-,- +,,,,,,,,,,,,,,, +TEMP1,,0x29,0x29,,0x29,0x29,,,0x29,0x29,0x29,0x29,0x29,0x29,0x29 +TEMP2,,0x2a,0x2a,,0x2a,0x2a,,,0x2a,0x2a,0x2a,0x2a,0x2a,0x2a,0x2a +TEMP3,,0x2b,0x2b,,0x2b,0x2b,,,0x2b,0x2b,0x2b,0x2b,0x2b,0x2b,0x2b +TEMP4,,0x2c,0x2c,,0x2c (vin7),0x2c,0x2c,,0x2c (vin7),0x2c,0x2c,0x2c,-,-,- +TEMP5,,0x2d,0x2d,,0x2d (vin8),-,0x2d,,0x2d (vin8),0x2d,0x2d,0x2d,-,-,- +TEMP6,,0x2e,0x2e,,0x2e (vin9),-,0x2e,,0x2e (vin9),0x2e,0x2e,0x2e,-,-,- +TEMP1_MIN,,0x41,0x41,,0x41,0x41,,,0x41,,0x41,0x41,0x41,0x41,0x41 +TEMP2_MIN,,0x43,0x43,,0x43,0x43,,,0x43,,0x43,0x43,0x43,0x43,0x43 +TEMP3_MIN,,0x45,0x45,,0x45,0x45,,,0x45,,0x45,0x45,0x45,0x45,0x45 +TEMP4_MIN,,,,,-,0x47,,,-,,0x47,0x47,-,-,- +TEMP5_MIN,,,,,-,-,0xb5,,-,,0xb5,0xb5,-,-,- +TEMP6_MIN,,,,,-,-,0xb7,,-,,0xb7,0xb7,-,-,- +TEMP1_MAX,,0x40,0x40,,0x40,0x40,,,0x40,,0x40,0x40,0x40,0x40,0x40 +TEMP2_MAX,,0x42,0x42,,0x42,0x42,,,0x42,,0x42,0x42,0x42,0x42,0x42 +TEMP3_MAX,,0x44,0x44,,0x44,0x44,,,0x44,,0x44,0x44,0x44,0x44,0x44 +TEMP4_MAX,,,,,-,0x46,,,-,,0x46,0x46,-,-,- +TEMP5_MAX,,,,,-,-,0xb4,,-,,0xb4,0xb4,-,-,- +TEMP6_MAX,,,,,,-,0xb6,,-,,0xb6,0xb6,-,-,- +TEMP1_TYPE,,"0x51[0,3]; 0x21d[0-3]",0x51,0x51,0x51,0x51,0x51,,0x51,"0x51[0,3]; 0x21d[0-3]","0x51[0,3]; 0x21d[0-3]","0x51[0,3]; 0x21d[0-3]",0x51,0x51,0x51 +TEMP2_TYPE,,"0x51[1,4];0x21d[4-7]",0x51,0x51,0x51,0x51,0x51,,0x51,"0x51[1,4];0x21d[4-7]","0x51[1,4];0x21d[4-7]","0x51[1,4];0x21d[4-7]",0x51,0x51,0x51 +TEMP3_TYPE,,"0x51[2,5];0x21e",0x51,0x51,0x51,0x51,0x51,,0x51,"0x51[2,5];0x21e","0x51[2,5];0x21e","0x51[2,5];0x21e",0x51,0x51,0x51 +TEMP4_TYPE,,,,,0x77,0x55[7]; 0x51[6-7],0x55[7],,0x77,0x21e,0x21e,0x21e,,-,- +TEMP5_TYPE,,,,,0x77,,,,0x77,0x21f,0x21f,0x21f,,-,- +TEMP6_TYPE,,,,,0x77,,,,0x77,0x21f,0x21f,0x21f,,-,- +,,,,,,,,,,,,,,, +differs,,,,,,,,,,,,,,, +guesswork,,,,,,,,,,,,,,, +,,,,,,,,,,,,,,, +Warning: The EC on at least some of the multi-page chips (IT8665 confirmed) accesses the registers and changes the page while doing so(!).,,,,,,,,,,,,,,, \ No newline at end of file